From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 4/8] drm/i915: s/HAS_POWER_WELL/IS_HASWELL/ in intel_display_capture_error_state Date: Fri, 01 Nov 2013 22:37:37 +0200 Message-ID: <1383338257.2909.4.camel@ideak-mobl> References: <1383326394-3933-1-git-send-email-imre.deak@intel.com> <1383326394-3933-5-git-send-email-imre.deak@intel.com> <20131101194140.GV4167@phenom.ffwll.local> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 88CB9EFB0B for ; Fri, 1 Nov 2013 13:38:39 -0700 (PDT) In-Reply-To: <20131101194140.GV4167@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, 2013-11-01 at 20:41 +0100, Daniel Vetter wrote: > On Fri, Nov 01, 2013 at 07:19:50PM +0200, Imre Deak wrote: > > Some upcoming platforms with power wells don't have this register, so > > check for Haswell instead. > > > > Signed-off-by: Imre Deak > > The point of HAS_POWER_WELL was to make bdw work (for which we now have > approval apparently). Depending upon how this all shapes out it's probably > better to stall this series for a little bit until the bdw stuff has > landed. Ok, rebasing this on top of the BDW stuff is minimal work. But comments on it would still be appreciated. --Imre