From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 22/62] drm/i915/bdw: Implement Full Force Miss disables Date: Tue, 05 Nov 2013 17:41:21 +0200 Message-ID: <1383666081.7273.11.camel@intelbox> References: <1383451680-11173-1-git-send-email-benjamin.widawsky@intel.com> <1383451680-11173-23-git-send-email-benjamin.widawsky@intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1003783655==" Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id C2B9CEFDF8 for ; Tue, 5 Nov 2013 07:41:24 -0800 (PST) In-Reply-To: <1383451680-11173-23-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Ben Widawsky Cc: Intel GFX , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org --===============1003783655== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-MenNbiu1hG3os9XgMZ9K" --=-MenNbiu1hG3os9XgMZ9K Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sat, 2013-11-02 at 21:07 -0700, Ben Widawsky wrote: > Implements WaVSRefCountFullforceMissDisable > Implements WaDSRefCountFullforceMissDisable >=20 > v2: Rebased on the HSW patch (which fixed the bug from v1) > commit 41c0b3a88c7bae96d8e2ee60c7ed91f57fd152d7 > Author: Ben Widawsky > Date: Sat Jan 26 11:52:00 2013 -0800 >=20 > drm/i915: Implement WaVSRefCountFullforceMissDisable >=20 > Cc: Ville Syrj=C3=A4l=C3=A4 > Reviewed-by: Ville Syrj=C3=A4l=C3=A4 > Signed-off-by: Ben Widawsky > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_pm.c | 4 ++++ > 2 files changed, 5 insertions(+) >=20 > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_= reg.h > index 9929750..68b877d 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -990,6 +990,7 @@ > =20 > #define GEN7_FF_THREAD_MODE 0x20a0 > #define GEN7_FF_SCHED_MASK 0x0077070 > +#define GEN7_FF_DS_REF_CNT_FFME (1 << 19) > #define GEN7_FF_TS_SCHED_HS1 (0x5<<16) > #define GEN7_FF_TS_SCHED_HS0 (0x3<<16) > #define GEN7_FF_TS_SCHED_LOAD_BALANCE (0x1<<16) > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel= _pm.c > index abc51ea..81ec2c3 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -5147,6 +5147,10 @@ static void gen7_setup_fixed_func_scheduler(struct= drm_i915_private *dev_priv) > if (IS_HASWELL(dev_priv->dev)) > reg &=3D ~GEN7_FF_VS_REF_CNT_FFME; > =20 > + /* WaVSRefCountFullforceMissDisable|WaDSRefCountFullforceMissDisable */ > + if (IS_GEN8(dev_priv->dev)) > + reg &=3D ~(GEN7_FF_DS_REF_CNT_FFME | GEN7_FF_VS_REF_CNT_FFME); > + > I915_WRITE(GEN7_FF_THREAD_MODE, reg); > } gen7_setup_fixed_func_scheduler() isn't called for GEN8. --Imre --=-MenNbiu1hG3os9XgMZ9K Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQEcBAABAgAGBQJSeRGhAAoJEORIIAnNuWDFyacIANN7xzMkBPO6GcXlrxmtqKDy G3zOwIQkfAe74mbSCo7P1GXtcVpc24+1Pv0dutPjGZkolGcYpPzWSOo7uoCwf51K rQcWItVh/FDhM4znOHSVkR1h7NLgZBbwNbdB0CQ5W0m4SqR/2th9igY5dk4BAull QrRDRtUIqjlQPowrRVnEh6EAVw5cMS6XUNmECHpjWNuapB9A5prox3bYtXb0vRuQ sNzLk902Rdg3WUmttefGXe5i6GIHt1rwccfJuxK9f1kpU4+DsX4PMEZQcBwcCS8F Eufnq6N/ChZzxZvMWxwJ6SBtmgrhFmXQi0tsPYVLASPkaJl6SkcWOPW5O1Gn0XI= =7aSw -----END PGP SIGNATURE----- --=-MenNbiu1hG3os9XgMZ9K-- --===============1003783655== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1003783655==--