From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: [PATCH 09/21] drm/i915/bdw: Take render error interrupt out of the mask Date: Thu, 7 Nov 2013 21:40:39 -0800 Message-ID: <1383889251-498-9-git-send-email-benjamin.widawsky@intel.com> References: <1383889251-498-1-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id E447FEE9C6 for ; Thu, 7 Nov 2013 22:09:11 -0800 (PST) In-Reply-To: <1383889251-498-1-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Intel GFX Cc: Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org From: Daniel Vetter The handling of the error interrupts isn't wired up at all. And it hasn't been ever since ilk happened, so don't bother. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index e32c08a..b620337 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -2132,8 +2132,7 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev) if (INTEL_INFO(dev)->gen >= 8) { ring->irq_enable_mask = - (GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT) | - GT_RENDER_CS_MASTER_ERROR_INTERRUPT; + GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT; ring->irq_get = gen8_ring_get_irq; ring->irq_put = gen8_ring_put_irq; ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer; -- 1.8.4.2