From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: [PATCH v2 5/8] drm/i915: protect HSW power well check with IS_HASWELL in redisable_vga Date: Thu, 14 Nov 2013 15:10:47 +0200 Message-ID: <1384434647-3163-1-git-send-email-imre.deak@intel.com> References: <1383326394-3933-1-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 29F8F1058A1 for ; Thu, 14 Nov 2013 05:10:50 -0800 (PST) In-Reply-To: <1383326394-3933-1-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org From: Jesse Barnes This may need work if other platforms do the same thing, but in the meantime we should avoid looking at HSW specific bits in this generic function. Signed-off-by: Jesse Barnes Reviewed-by: Paulo Zanoni [added IS_BROADWELL too as that needs the same handling (Imre)] --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index bb5e4e9..7b28137 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -11042,7 +11042,7 @@ void i915_redisable_vga(struct drm_device *dev) * level, just check if the power well is enabled instead of trying to * follow the "don't touch the power well if we don't need it" policy * the rest of the driver uses. */ - if (HAS_POWER_WELL(dev) && + if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) && (I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE_ENABLED) == 0) return; -- 1.8.4