From mboxrd@z Thu Jan 1 00:00:00 1970 From: deepak.s@intel.com Subject: [PATCH v2 0/3] drm/i915: Split VLV forcewake routines. Date: Thu, 28 Nov 2013 09:20:40 +0530 Message-ID: <1385610643-8352-1-git-send-email-deepak.s@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 4569BFAA44 for ; Wed, 27 Nov 2013 19:49:52 -0800 (PST) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Deepak S List-Id: intel-gfx@lists.freedesktop.org From: Deepak S Valleyview has power wells MEDIA & RENDER and by spliting vlv force wake routines and individually controling Media/Render well, We have seen power savings in the lower sub-1W range on different workloads, e.g. glbenchmark, media playback v2: Addressed review comments. Deepak S (3): drm/i915: Add power well arguments to force wake routines. drm/i915/vlv: Valleyview support for forcewake Individual power wells. v2 drm/i915: Enabling DebugFS for valleyview forcewake counts. v2 drivers/gpu/drm/i915/i915_debugfs.c | 22 ++-- drivers/gpu/drm/i915/i915_drv.h | 32 ++++- drivers/gpu/drm/i915/i915_reg.h | 4 +- drivers/gpu/drm/i915/intel_display.c | 4 +- drivers/gpu/drm/i915/intel_pm.c | 22 ++-- drivers/gpu/drm/i915/intel_ringbuffer.c | 14 ++- drivers/gpu/drm/i915/intel_uncore.c | 217 +++++++++++++++++++++++++------- 7 files changed, 246 insertions(+), 69 deletions(-) -- 1.8.4.2