From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 06/19] drm/i915: get/put runtime PM when we get/put a power domain Date: Thu, 19 Dec 2013 11:54:56 -0200 Message-ID: <1387461309-2756-7-git-send-email-przanoni@gmail.com> References: <1387461309-2756-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-qa0-f52.google.com (mail-qa0-f52.google.com [209.85.216.52]) by gabe.freedesktop.org (Postfix) with ESMTP id 09DFA437A8 for ; Thu, 19 Dec 2013 05:55:35 -0800 (PST) Received: by mail-qa0-f52.google.com with SMTP id cm18so1489609qab.4 for ; Thu, 19 Dec 2013 05:55:35 -0800 (PST) In-Reply-To: <1387461309-2756-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni Any power domain will require the HW to be in PCI D0 state, so just do the simple thing. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_pm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index c644a6f..273e806 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5301,6 +5301,8 @@ void intel_display_power_get(struct drm_device *dev, struct i915_power_well *power_well; int i; + intel_runtime_pm_get(dev_priv); + power_domains = &dev_priv->power_domains; mutex_lock(&power_domains->lock); @@ -5332,6 +5334,8 @@ void intel_display_power_put(struct drm_device *dev, __intel_power_well_put(dev, power_well); mutex_unlock(&power_domains->lock); + + intel_runtime_pm_put(dev_priv); } static struct i915_power_domains *hsw_pwr; -- 1.8.3.1