[RFC] Subclassing struct drm_device

[RFC] Subclassing struct drm_device

[Damien Lespiau]

I was reminded on Monday that we'd like to be able to subclass struct
drm_device so we don't have to always juggle between a pointer to a struct
drm_device and its drv_private field to access everything we care about.

It'd be nicer for those two pointers to have the same value to avoid a few
extra instructions pretty everywhere.

Turns out, there's a cheap way to go towards that goal, just make DRM core
allocate enough space for drivers that want to subclass struct drm_device and
have a transition path where dev_private points to the start of the structure.

I've converted i915 to do just that, seems to still boot. Of course, a number
of nice refactoring are possible once dev == dev_priv, but that'd be for follow
up patches on top.

Thoughts?

-- 
Damien

[PATCH 1/5] drm: Remove unnecessary dev_priv_size initializations to 0

[Damien Lespiau]

Not specifying it makes it a bit easier to identify drivers that really
need this field, and down the line, ease refactoring. This field doesn't
make sense for KMS drivers anyway.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/ast/ast_drv.c       | 1 -
 drivers/gpu/drm/qxl/qxl_drv.c       | 1 -
 drivers/gpu/drm/radeon/radeon_drv.c | 1 -
 3 files changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c
index 5137f15..2ba39ac 100644
--- a/drivers/gpu/drm/ast/ast_drv.c
+++ b/drivers/gpu/drm/ast/ast_drv.c
@@ -198,7 +198,6 @@ static const struct file_operations ast_fops = {
 
 static struct drm_driver driver = {
 	.driver_features = DRIVER_MODESET | DRIVER_GEM,
-	.dev_priv_size = 0,
 
 	.load = ast_driver_load,
 	.unload = ast_driver_unload,
diff --git a/drivers/gpu/drm/qxl/qxl_drv.c b/drivers/gpu/drm/qxl/qxl_drv.c
index fee8748..6e93663 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.c
+++ b/drivers/gpu/drm/qxl/qxl_drv.c
@@ -214,7 +214,6 @@ static struct pci_driver qxl_pci_driver = {
 static struct drm_driver qxl_driver = {
 	.driver_features = DRIVER_GEM | DRIVER_MODESET |
 			   DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED,
-	.dev_priv_size = 0,
 	.load = qxl_driver_load,
 	.unload = qxl_driver_unload,
 
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 54d6c9b..394e0a3 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -514,7 +514,6 @@ static struct drm_driver kms_driver = {
 	    DRIVER_USE_AGP |
 	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
 	    DRIVER_PRIME | DRIVER_RENDER,
-	.dev_priv_size = 0,
 	.load = radeon_driver_load_kms,
 	.open = radeon_driver_open_kms,
 	.preclose = radeon_driver_preclose_kms,
-- 
1.8.3.1

[PATCH 2/5] drm: Remove dev_priv_size from struct drm_buf

[Damien Lespiau]

This field is only used when creating a new buffer and can already be
found in the drm_driver structure, so no need to duplicate the
information for every buffer.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/drm_bufs.c | 13 ++++++-------
 include/drm/drmP.h         |  1 -
 2 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index edec31f..3bf8cc5 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -705,8 +705,8 @@ int drm_addbufs_agp(struct drm_device * dev, struct drm_buf_desc * request)
 		buf->pending = 0;
 		buf->file_priv = NULL;
 
-		buf->dev_priv_size = dev->driver->dev_priv_size;
-		buf->dev_private = kzalloc(buf->dev_priv_size, GFP_KERNEL);
+		buf->dev_private = kzalloc(dev->driver->dev_priv_size,
+					   GFP_KERNEL);
 		if (!buf->dev_private) {
 			/* Set count correctly so we free the proper amount. */
 			entry->buf_count = count;
@@ -902,9 +902,8 @@ int drm_addbufs_pci(struct drm_device * dev, struct drm_buf_desc * request)
 			buf->pending = 0;
 			buf->file_priv = NULL;
 
-			buf->dev_priv_size = dev->driver->dev_priv_size;
-			buf->dev_private = kzalloc(buf->dev_priv_size,
-						GFP_KERNEL);
+			buf->dev_private = kzalloc(dev->driver->dev_priv_size,
+						   GFP_KERNEL);
 			if (!buf->dev_private) {
 				/* Set count correctly so we free the proper amount. */
 				entry->buf_count = count;
@@ -1066,8 +1065,8 @@ static int drm_addbufs_sg(struct drm_device * dev, struct drm_buf_desc * request
 		buf->pending = 0;
 		buf->file_priv = NULL;
 
-		buf->dev_priv_size = dev->driver->dev_priv_size;
-		buf->dev_private = kzalloc(buf->dev_priv_size, GFP_KERNEL);
+		buf->dev_private = kzalloc(dev->driver->dev_priv_size,
+					   GFP_KERNEL);
 		if (!buf->dev_private) {
 			/* Set count correctly so we free the proper amount. */
 			entry->buf_count = count;
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 2fe9b5d..2274274 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -364,7 +364,6 @@ struct drm_buf {
 		DRM_LIST_RECLAIM = 5
 	} list;			       /**< Which list we're on */
 
-	int dev_priv_size;		 /**< Size of buffer private storage */
 	void *dev_private;		 /**< Per-buffer private storage */
 };
 
-- 
1.8.3.1

[PATCH 3/5] drm: Rename dev_priv_size to buf_priv_size

[Damien Lespiau]

This field is really the size of the per-driver private data attached to
a struct drm_buf. Name it accordingly and add a comment so it doesn't
get confused with, say, the size of the private data attatched to a struct
drm_device.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/drm_bufs.c          | 6 +++---
 drivers/gpu/drm/i810/i810_drv.c     | 2 +-
 drivers/gpu/drm/mga/mga_drv.c       | 2 +-
 drivers/gpu/drm/r128/r128_drv.c     | 2 +-
 drivers/gpu/drm/radeon/radeon_drv.c | 2 +-
 drivers/gpu/drm/savage/savage_drv.c | 2 +-
 include/drm/drmP.h                  | 3 ++-
 7 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 3bf8cc5..a4e3ab0 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -705,7 +705,7 @@ int drm_addbufs_agp(struct drm_device * dev, struct drm_buf_desc * request)
 		buf->pending = 0;
 		buf->file_priv = NULL;
 
-		buf->dev_private = kzalloc(dev->driver->dev_priv_size,
+		buf->dev_private = kzalloc(dev->driver->buf_priv_size,
 					   GFP_KERNEL);
 		if (!buf->dev_private) {
 			/* Set count correctly so we free the proper amount. */
@@ -902,7 +902,7 @@ int drm_addbufs_pci(struct drm_device * dev, struct drm_buf_desc * request)
 			buf->pending = 0;
 			buf->file_priv = NULL;
 
-			buf->dev_private = kzalloc(dev->driver->dev_priv_size,
+			buf->dev_private = kzalloc(dev->driver->buf_priv_size,
 						   GFP_KERNEL);
 			if (!buf->dev_private) {
 				/* Set count correctly so we free the proper amount. */
@@ -1065,7 +1065,7 @@ static int drm_addbufs_sg(struct drm_device * dev, struct drm_buf_desc * request
 		buf->pending = 0;
 		buf->file_priv = NULL;
 
-		buf->dev_private = kzalloc(dev->driver->dev_priv_size,
+		buf->dev_private = kzalloc(dev->driver->buf_priv_size,
 					   GFP_KERNEL);
 		if (!buf->dev_private) {
 			/* Set count correctly so we free the proper amount. */
diff --git a/drivers/gpu/drm/i810/i810_drv.c b/drivers/gpu/drm/i810/i810_drv.c
index 441ccf8..b70a4fe 100644
--- a/drivers/gpu/drm/i810/i810_drv.c
+++ b/drivers/gpu/drm/i810/i810_drv.c
@@ -59,7 +59,7 @@ static struct drm_driver driver = {
 	.driver_features =
 	    DRIVER_USE_AGP |
 	    DRIVER_HAVE_DMA,
-	.dev_priv_size = sizeof(drm_i810_buf_priv_t),
+	.buf_priv_size = sizeof(drm_i810_buf_priv_t),
 	.load = i810_driver_load,
 	.lastclose = i810_driver_lastclose,
 	.preclose = i810_driver_preclose,
diff --git a/drivers/gpu/drm/mga/mga_drv.c b/drivers/gpu/drm/mga/mga_drv.c
index 6b1a87c..bdb44c4 100644
--- a/drivers/gpu/drm/mga/mga_drv.c
+++ b/drivers/gpu/drm/mga/mga_drv.c
@@ -60,7 +60,7 @@ static struct drm_driver driver = {
 	.driver_features =
 	    DRIVER_USE_AGP | DRIVER_PCI_DMA |
 	    DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED,
-	.dev_priv_size = sizeof(drm_mga_buf_priv_t),
+	.buf_priv_size = sizeof(drm_mga_buf_priv_t),
 	.load = mga_driver_load,
 	.unload = mga_driver_unload,
 	.lastclose = mga_driver_lastclose,
diff --git a/drivers/gpu/drm/r128/r128_drv.c b/drivers/gpu/drm/r128/r128_drv.c
index 5bd307c..09b2a73 100644
--- a/drivers/gpu/drm/r128/r128_drv.c
+++ b/drivers/gpu/drm/r128/r128_drv.c
@@ -58,7 +58,7 @@ static struct drm_driver driver = {
 	.driver_features =
 	    DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
 	    DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED,
-	.dev_priv_size = sizeof(drm_r128_buf_priv_t),
+	.buf_priv_size = sizeof(drm_r128_buf_priv_t),
 	.load = r128_driver_load,
 	.preclose = r128_driver_preclose,
 	.lastclose = r128_driver_lastclose,
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 394e0a3..2afd583 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -287,7 +287,7 @@ static struct drm_driver driver_old = {
 	.driver_features =
 	    DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
-	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
+	.buf_priv_size = sizeof(drm_radeon_buf_priv_t),
 	.load = radeon_driver_load,
 	.firstopen = radeon_driver_firstopen,
 	.open = radeon_driver_open,
diff --git a/drivers/gpu/drm/savage/savage_drv.c b/drivers/gpu/drm/savage/savage_drv.c
index 3c03021..92c5b64 100644
--- a/drivers/gpu/drm/savage/savage_drv.c
+++ b/drivers/gpu/drm/savage/savage_drv.c
@@ -51,7 +51,7 @@ static const struct file_operations savage_driver_fops = {
 static struct drm_driver driver = {
 	.driver_features =
 	    DRIVER_USE_AGP | DRIVER_HAVE_DMA | DRIVER_PCI_DMA,
-	.dev_priv_size = sizeof(drm_savage_buf_priv_t),
+	.buf_priv_size = sizeof(drm_savage_buf_priv_t),
 	.load = savage_driver_load,
 	.firstopen = savage_driver_firstopen,
 	.preclose = savage_reclaim_buffers,
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 2274274..6800c20 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -994,7 +994,8 @@ struct drm_driver {
 	char *date;
 
 	u32 driver_features;
-	int dev_priv_size;
+	/* size of the private data attached to a struct drm_buf */
+	int buf_priv_size;
 	const struct drm_ioctl_desc *ioctls;
 	int num_ioctls;
 	const struct file_operations *fops;
-- 
1.8.3.1

[PATCH 4/5] drm: Add support for subclassing struct drm_device

[Damien Lespiau]

Currently, drivers are expected to allocate private data and attach it
to dev_private in struct drm_device.

This has the unfortunate property to require driver code to juggle
between the pointer to struct drm_device and dev->dev_private instead of
using the same pointer if they could embed the device structure.

This patch enables drivers to declare the size of the device structure
they want DRM core to create for them.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/drm_stub.c | 8 +++++++-
 include/drm/drmP.h         | 8 ++++++++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
index 98a33c580..161dd9a 100644
--- a/drivers/gpu/drm/drm_stub.c
+++ b/drivers/gpu/drm/drm_stub.c
@@ -433,8 +433,14 @@ struct drm_device *drm_dev_alloc(struct drm_driver *driver,
 {
 	struct drm_device *dev;
 	int ret;
+	size_t device_struct_size;
 
-	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+	if (driver->device_struct_size)
+		device_struct_size = driver->device_struct_size;
+	else
+		device_struct_size = sizeof(*dev);
+
+	dev = kzalloc(device_struct_size, GFP_KERNEL);
 	if (!dev)
 		return NULL;
 
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 6800c20..219b153 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -996,6 +996,14 @@ struct drm_driver {
 	u32 driver_features;
 	/* size of the private data attached to a struct drm_buf */
 	int buf_priv_size;
+	/*
+	 * DRM drivers can subclass struct drm_device to have their own device
+	 * structure to store private data. In this case, they need to declare
+	 * the size of the child structure (ie the structure embedding a struct
+	 * drm_device as first field) for the DRM core to allocate a big
+	 * enough device structure.
+	 */
+	size_t device_struct_size;
 	const struct drm_ioctl_desc *ioctls;
 	int num_ioctls;
 	const struct file_operations *fops;
-- 
1.8.3.1

[PATCH 5/5] drm/i915: Make struct drm_i915_private a subclass of struct drm_device

[Damien Lespiau]

This patch is the result of running:
sed -i -e 's/\([^&]\)dev_priv->dev\([^-]\)/\1\&dev_priv->dev\2/g' drivers/gpu/drm/i915/*.[ch]
sed -i -e 's/dev_priv->dev->/dev_priv->dev./g' drivers/gpu/drm/i915/*.[ch]

and a minor correction in gem_context.c that the 2 regex above didn't
catch.

In addition:
  - struct drm_i915_private now embed a struct drm_device instead of
    just a pointer to it,
  - The loading code had to be changed (i915_driver_load()) to not
    allocate the private structure,
  - we need to specificy the size of struct drm_i915_private in our
    struct drm_driver definition for the DRM core to allocate enough
    space,
  - to ease the transition, dev->dev_private is still valid and points
    to the start of the structure.
  - don't kfree dev_private either in the _load() error path or the
    _unload() vfunc.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c     |  2 +-
 drivers/gpu/drm/i915/i915_dma.c         | 15 ++----
 drivers/gpu/drm/i915/i915_drv.c         |  3 +-
 drivers/gpu/drm/i915/i915_drv.h         |  2 +-
 drivers/gpu/drm/i915/i915_gem.c         | 14 +++---
 drivers/gpu/drm/i915/i915_gem_context.c |  6 +--
 drivers/gpu/drm/i915/i915_gem_gtt.c     |  6 +--
 drivers/gpu/drm/i915/i915_gpu_error.c   |  2 +-
 drivers/gpu/drm/i915/i915_irq.c         | 30 +++++------
 drivers/gpu/drm/i915/i915_sysfs.c       |  8 +--
 drivers/gpu/drm/i915/intel_bios.c       |  6 +--
 drivers/gpu/drm/i915/intel_ddi.c        |  2 +-
 drivers/gpu/drm/i915/intel_display.c    | 88 ++++++++++++++++-----------------
 drivers/gpu/drm/i915/intel_dp.c         |  2 +-
 drivers/gpu/drm/i915/intel_hdmi.c       |  2 +-
 drivers/gpu/drm/i915/intel_i2c.c        | 14 +++---
 drivers/gpu/drm/i915/intel_lvds.c       |  2 +-
 drivers/gpu/drm/i915/intel_opregion.c   |  2 +-
 drivers/gpu/drm/i915/intel_pm.c         | 44 ++++++++---------
 drivers/gpu/drm/i915/intel_uncore.c     | 14 +++---
 20 files changed, 129 insertions(+), 135 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 7252f30..1dbbb6b 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3091,7 +3091,7 @@ i915_cache_sharing_get(void *data, u64 *val)
 	snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
 
 	intel_runtime_pm_put(dev_priv);
-	mutex_unlock(&dev_priv->dev->struct_mutex);
+	mutex_unlock(&dev_priv->dev.struct_mutex);
 
 	*val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT;
 
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index ee9502b..6520456 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -70,7 +70,7 @@
 static inline u32
 intel_read_legacy_status_page(struct drm_i915_private *dev_priv, int reg)
 {
-	if (I915_NEED_GFX_HWS(dev_priv->dev))
+	if (I915_NEED_GFX_HWS(&dev_priv->dev))
 		return ioread32(dev_priv->dri1.gfx_hws_cpu_addr + reg);
 	else
 		return intel_read_status_page(LP_RING(dev_priv), reg);
@@ -1417,7 +1417,7 @@ void i915_master_destroy(struct drm_device *dev, struct drm_master *master)
 static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
 {
 	struct apertures_struct *ap;
-	struct pci_dev *pdev = dev_priv->dev->pdev;
+	struct pci_dev *pdev = dev_priv->dev.pdev;
 	bool primary;
 
 	ap = alloc_apertures(1);
@@ -1451,7 +1451,7 @@ static void i915_dump_device_info(struct drm_i915_private *dev_priv)
 	DRM_DEBUG_DRIVER("i915 device info: gen=%i, pciid=0x%04x flags="
 			 DEV_INFO_FOR_EACH_FLAG(PRINT_S, SEP_EMPTY),
 			 info->gen,
-			 dev_priv->dev->pdev->device,
+			 dev_priv->dev.pdev->device,
 			 DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_COMMA));
 #undef PRINT_S
 #undef SEP_EMPTY
@@ -1490,12 +1490,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 	if (!drm_core_check_feature(dev, DRIVER_MODESET) && !dev->agp)
 		return -EINVAL;
 
-	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
-	if (dev_priv == NULL)
-		return -ENOMEM;
-
-	dev->dev_private = (void *)dev_priv;
-	dev_priv->dev = dev;
+	dev->dev_private = dev_priv = (void *)dev;
 	dev_priv->info = info;
 
 	spin_lock_init(&dev_priv->irq_lock);
@@ -1701,7 +1696,6 @@ put_bridge:
 free_priv:
 	if (dev_priv->slab)
 		kmem_cache_destroy(dev_priv->slab);
-	kfree(dev_priv);
 	return ret;
 }
 
@@ -1804,7 +1798,6 @@ int i915_driver_unload(struct drm_device *dev)
 		kmem_cache_destroy(dev_priv->slab);
 
 	pci_dev_put(dev_priv->bridge_dev);
-	kfree(dev->dev_private);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 61fb9fc..cabec8a 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -597,7 +597,7 @@ void intel_console_resume(struct work_struct *work)
 	struct drm_i915_private *dev_priv =
 		container_of(work, struct drm_i915_private,
 			     console_resume_work);
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 
 	console_lock();
 	intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
@@ -985,6 +985,7 @@ static struct drm_driver driver = {
 	    DRIVER_USE_AGP |
 	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | DRIVER_PRIME |
 	    DRIVER_RENDER,
+	.device_struct_size = sizeof(struct drm_i915_private),
 	.load = i915_driver_load,
 	.unload = i915_driver_unload,
 	.open = i915_driver_open,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cc8afff..7fa6900 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1357,7 +1357,7 @@ struct intel_pipe_crc {
 };
 
 typedef struct drm_i915_private {
-	struct drm_device *dev;
+	struct drm_device dev;
 	struct kmem_cache *slab;
 
 	const struct intel_device_info *info;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 656406d..5c4a2ae 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1839,7 +1839,7 @@ i915_gem_shrink_all(struct drm_i915_private *dev_priv)
 	struct drm_i915_gem_object *obj, *next;
 	long freed = 0;
 
-	i915_gem_evict_everything(dev_priv->dev);
+	i915_gem_evict_everything(&dev_priv->dev);
 
 	list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list,
 				 global_list) {
@@ -2218,7 +2218,7 @@ int __i915_add_request(struct intel_ring_buffer *ring,
 			queue_delayed_work(dev_priv->wq,
 					   &dev_priv->mm.retire_work,
 					   round_jiffies_up_relative(HZ));
-			intel_mark_busy(dev_priv->dev);
+			intel_mark_busy(&dev_priv->dev);
 		}
 	}
 
@@ -2555,7 +2555,7 @@ i915_gem_retire_work_handler(struct work_struct *work)
 {
 	struct drm_i915_private *dev_priv =
 		container_of(work, typeof(*dev_priv), mm.retire_work.work);
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	bool idle;
 
 	/* Come back later if the device is busy... */
@@ -2575,7 +2575,7 @@ i915_gem_idle_work_handler(struct work_struct *work)
 	struct drm_i915_private *dev_priv =
 		container_of(work, typeof(*dev_priv), mm.idle_work.work);
 
-	intel_mark_idle(dev_priv->dev);
+	intel_mark_idle(&dev_priv->dev);
 }
 
 /**
@@ -4623,7 +4623,7 @@ void i915_init_vm(struct drm_i915_private *dev_priv,
 {
 	if (!i915_is_ggtt(vm))
 		drm_mm_init(&vm->mm, vm->start, vm->total);
-	vm->dev = dev_priv->dev;
+	vm->dev = &dev_priv->dev;
 	INIT_LIST_HEAD(&vm->active_list);
 	INIT_LIST_HEAD(&vm->inactive_list);
 	INIT_LIST_HEAD(&vm->global_link);
@@ -4955,7 +4955,7 @@ i915_gem_inactive_count(struct shrinker *shrinker, struct shrink_control *sc)
 		container_of(shrinker,
 			     struct drm_i915_private,
 			     mm.inactive_shrinker);
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct drm_i915_gem_object *obj;
 	bool unlock = true;
 	unsigned long count;
@@ -5058,7 +5058,7 @@ i915_gem_inactive_scan(struct shrinker *shrinker, struct shrink_control *sc)
 		container_of(shrinker,
 			     struct drm_i915_private,
 			     mm.inactive_shrinker);
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	unsigned long freed;
 	bool unlock = true;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 44dddc00..4c05524 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -444,7 +444,7 @@ int i915_gem_context_enable(struct drm_i915_private *dev_priv)
 	struct intel_ring_buffer *ring;
 	int ret, i;
 
-	if (!HAS_HW_CONTEXTS(dev_priv->dev))
+	if (!HAS_HW_CONTEXTS(&dev_priv->dev))
 		return 0;
 
 	/* This is the only place the aliasing PPGTT gets enabled, which means
@@ -528,7 +528,7 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
 {
 	struct i915_hw_context *ctx;
 
-	if (!HAS_HW_CONTEXTS(file_priv->dev_priv->dev))
+	if (!HAS_HW_CONTEXTS(&file_priv->dev_priv->dev))
 		return file_priv->private_default_ctx;
 
 	ctx = (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
@@ -723,7 +723,7 @@ int i915_switch_context(struct intel_ring_buffer *ring,
 {
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 
-	WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
+	WARN_ON(!mutex_is_locked(&dev_priv->dev.struct_mutex));
 
 	BUG_ON(file && to == NULL);
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 1013e1a..07f9f19 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1033,7 +1033,7 @@ static bool do_idling(struct drm_i915_private *dev_priv)
 
 	if (unlikely(dev_priv->gtt.do_idle_maps)) {
 		dev_priv->mm.interruptible = false;
-		if (i915_gpu_idle(dev_priv->dev)) {
+		if (i915_gpu_idle(&dev_priv->dev)) {
 			DRM_ERROR("Couldn't idle GPU\n");
 			/* Wait a bit, in hopes it avoids the hang */
 			udelay(10);
@@ -1716,7 +1716,7 @@ static int i915_gmch_probe(struct drm_device *dev,
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret;
 
-	ret = intel_gmch_probe(dev_priv->bridge_dev, dev_priv->dev->pdev, NULL);
+	ret = intel_gmch_probe(dev_priv->bridge_dev, dev_priv->dev.pdev, NULL);
 	if (!ret) {
 		DRM_ERROR("failed to set up gmch\n");
 		return -EIO;
@@ -1724,7 +1724,7 @@ static int i915_gmch_probe(struct drm_device *dev,
 
 	intel_gtt_get(gtt_total, stolen, mappable_base, mappable_end);
 
-	dev_priv->gtt.do_idle_maps = needs_idle_maps(dev_priv->dev);
+	dev_priv->gtt.do_idle_maps = needs_idle_maps(&dev_priv->dev);
 	dev_priv->gtt.base.clear_range = i915_ggtt_clear_range;
 
 	if (unlikely(dev_priv->gtt.do_idle_maps))
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index ae8cf61..1decc45 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -693,7 +693,7 @@ i915_error_first_batchbuffer(struct drm_i915_private *dev_priv,
 	if (!ring->get_seqno)
 		return NULL;
 
-	if (HAS_BROKEN_CS_TLB(dev_priv->dev)) {
+	if (HAS_BROKEN_CS_TLB(&dev_priv->dev)) {
 		u32 acthd = I915_READ(ACTHD);
 
 		if (WARN_ON(ring->id != RCS))
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1d44c79..860fe8d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -842,7 +842,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
 {
 	drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
 						    hotplug_work);
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct drm_mode_config *mode_config = &dev->mode_config;
 	struct intel_connector *intel_connector;
 	struct intel_encoder *intel_encoder;
@@ -1019,10 +1019,10 @@ static void gen6_pm_rps_work(struct work_struct *work)
 			    dev_priv->rps.min_delay, dev_priv->rps.max_delay);
 	dev_priv->rps.last_adj = new_delay - dev_priv->rps.cur_delay;
 
-	if (IS_VALLEYVIEW(dev_priv->dev))
-		valleyview_set_rps(dev_priv->dev, new_delay);
+	if (IS_VALLEYVIEW(&dev_priv->dev))
+		valleyview_set_rps(&dev_priv->dev, new_delay);
 	else
-		gen6_set_rps(dev_priv->dev, new_delay);
+		gen6_set_rps(&dev_priv->dev, new_delay);
 
 	mutex_unlock(&dev_priv->rps.hw_lock);
 }
@@ -1051,7 +1051,7 @@ static void ivybridge_parity_work(struct work_struct *work)
 	 * In order to prevent a get/put style interface, acquire struct mutex
 	 * any time we access those registers.
 	 */
-	mutex_lock(&dev_priv->dev->struct_mutex);
+	mutex_lock(&dev_priv->dev.struct_mutex);
 
 	/* If we've screwed up tracking, just let the interrupt fire again */
 	if (WARN_ON(!dev_priv->l3_parity.which_slice))
@@ -1065,7 +1065,7 @@ static void ivybridge_parity_work(struct work_struct *work)
 		u32 reg;
 
 		slice--;
-		if (WARN_ON_ONCE(slice >= NUM_L3_SLICES(dev_priv->dev)))
+		if (WARN_ON_ONCE(slice >= NUM_L3_SLICES(&dev_priv->dev)))
 			break;
 
 		dev_priv->l3_parity.which_slice &= ~(1<<slice);
@@ -1087,7 +1087,7 @@ static void ivybridge_parity_work(struct work_struct *work)
 		parity_event[4] = kasprintf(GFP_KERNEL, "SLICE=%d", slice);
 		parity_event[5] = NULL;
 
-		kobject_uevent_env(&dev_priv->dev->primary->kdev->kobj,
+		kobject_uevent_env(&dev_priv->dev.primary->kdev->kobj,
 				   KOBJ_CHANGE, parity_event);
 
 		DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
@@ -1104,10 +1104,10 @@ static void ivybridge_parity_work(struct work_struct *work)
 out:
 	WARN_ON(dev_priv->l3_parity.which_slice);
 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
-	ilk_enable_gt_irq(dev_priv, GT_PARITY_ERROR(dev_priv->dev));
+	ilk_enable_gt_irq(dev_priv, GT_PARITY_ERROR(&dev_priv->dev));
 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
 
-	mutex_unlock(&dev_priv->dev->struct_mutex);
+	mutex_unlock(&dev_priv->dev.struct_mutex);
 }
 
 static void ivybridge_parity_error_irq_handler(struct drm_device *dev, u32 iir)
@@ -1397,13 +1397,13 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
 		queue_work(dev_priv->wq, &dev_priv->rps.work);
 	}
 
-	if (HAS_VEBOX(dev_priv->dev)) {
+	if (HAS_VEBOX(&dev_priv->dev)) {
 		if (pm_iir & PM_VEBOX_USER_INTERRUPT)
-			notify_ring(dev_priv->dev, &dev_priv->ring[VECS]);
+			notify_ring(&dev_priv->dev, &dev_priv->ring[VECS]);
 
 		if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT) {
 			DRM_ERROR("VEBOX CS error interrupt 0x%08x\n", pm_iir);
-			i915_handle_error(dev_priv->dev, false);
+			i915_handle_error(&dev_priv->dev, false);
 		}
 	}
 }
@@ -1944,7 +1944,7 @@ static void i915_error_work_func(struct work_struct *work)
 						    work);
 	drm_i915_private_t *dev_priv = container_of(error, drm_i915_private_t,
 						    gpu_error);
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	char *error_event[] = { I915_ERROR_UEVENT "=1", NULL };
 	char *reset_event[] = { I915_RESET_UEVENT "=1", NULL };
 	char *reset_done_event[] = { I915_ERROR_UEVENT "=0", NULL };
@@ -2949,7 +2949,7 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
 
 static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	uint32_t de_pipe_masked = GEN8_PIPE_FLIP_DONE |
 		GEN8_PIPE_CDCLK_CRC_DONE |
 		GEN8_PIPE_FIFO_UNDERRUN |
@@ -3746,7 +3746,7 @@ static void i965_irq_uninstall(struct drm_device * dev)
 static void i915_reenable_hotplug_timer_func(unsigned long data)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *)data;
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct drm_mode_config *mode_config = &dev->mode_config;
 	unsigned long irqflags;
 	int i;
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 33bcae3..3ddb337 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -264,7 +264,7 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
 	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
 
 	mutex_lock(&dev_priv->rps.hw_lock);
-	if (IS_VALLEYVIEW(dev_priv->dev)) {
+	if (IS_VALLEYVIEW(&dev_priv->dev)) {
 		u32 freq;
 		freq = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
 		ret = vlv_gpu_freq(dev_priv, (freq >> 8) & 0xff);
@@ -297,7 +297,7 @@ static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute
 	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
 
 	mutex_lock(&dev_priv->rps.hw_lock);
-	if (IS_VALLEYVIEW(dev_priv->dev))
+	if (IS_VALLEYVIEW(&dev_priv->dev))
 		ret = vlv_gpu_freq(dev_priv, dev_priv->rps.max_delay);
 	else
 		ret = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
@@ -324,7 +324,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev,
 
 	mutex_lock(&dev_priv->rps.hw_lock);
 
-	if (IS_VALLEYVIEW(dev_priv->dev)) {
+	if (IS_VALLEYVIEW(&dev_priv->dev)) {
 		val = vlv_freq_opcode(dev_priv, val);
 
 		hw_max = valleyview_rps_max_freq(dev_priv);
@@ -373,7 +373,7 @@ static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute
 	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
 
 	mutex_lock(&dev_priv->rps.hw_lock);
-	if (IS_VALLEYVIEW(dev_priv->dev))
+	if (IS_VALLEYVIEW(&dev_priv->dev))
 		ret = vlv_gpu_freq(dev_priv, dev_priv->rps.min_delay);
 	else
 		ret = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index f220419..67074bb 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -368,7 +368,7 @@ static void
 parse_general_features(struct drm_i915_private *dev_priv,
 		       struct bdb_header *bdb)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct bdb_general_features *general;
 
 	general = find_section(bdb, BDB_GENERAL_FEATURES);
@@ -716,7 +716,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
 static void parse_ddi_ports(struct drm_i915_private *dev_priv,
 			    struct bdb_header *bdb)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	enum port port;
 
 	if (!HAS_DDI(dev))
@@ -800,7 +800,7 @@ parse_device_mapping(struct drm_i915_private *dev_priv,
 static void
 init_vbt_defaults(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	enum port port;
 
 	dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC;
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 1488b28..0fd8528 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1313,7 +1313,7 @@ static void intel_disable_ddi(struct intel_encoder *intel_encoder)
 
 int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	uint32_t lcpll = I915_READ(LCPLL_CTL);
 	uint32_t freq = lcpll & LCPLL_CLK_FREQ_MASK;
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ba9d62e..0ca4941 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -874,7 +874,7 @@ bool ibx_digital_port_connected(struct drm_i915_private *dev_priv,
 {
 	u32 bit;
 
-	if (HAS_PCH_IBX(dev_priv->dev)) {
+	if (HAS_PCH_IBX(&dev_priv->dev)) {
 		switch(port->port) {
 		case PORT_B:
 			bit = SDE_PORTB_HOTPLUG;
@@ -965,7 +965,7 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
 	bool cur_state;
 	struct intel_dpll_hw_state hw_state;
 
-	if (HAS_PCH_LPT(dev_priv->dev)) {
+	if (HAS_PCH_LPT(&dev_priv->dev)) {
 		DRM_DEBUG_DRIVER("LPT detected: skipping PCH PLL test\n");
 		return;
 	}
@@ -989,7 +989,7 @@ static void assert_fdi_tx(struct drm_i915_private *dev_priv,
 	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
 								      pipe);
 
-	if (HAS_DDI(dev_priv->dev)) {
+	if (HAS_DDI(&dev_priv->dev)) {
 		/* DDI does not have a specific FDI_TX register */
 		reg = TRANS_DDI_FUNC_CTL(cpu_transcoder);
 		val = I915_READ(reg);
@@ -1034,7 +1034,7 @@ static void assert_fdi_tx_pll_enabled(struct drm_i915_private *dev_priv,
 		return;
 
 	/* On Haswell, DDI ports are responsible for the FDI PLL setup */
-	if (HAS_DDI(dev_priv->dev))
+	if (HAS_DDI(&dev_priv->dev))
 		return;
 
 	reg = FDI_TX_CTL(pipe);
@@ -1065,7 +1065,7 @@ static void assert_panel_unlocked(struct drm_i915_private *dev_priv,
 	enum pipe panel_pipe = PIPE_A;
 	bool locked = true;
 
-	if (HAS_PCH_SPLIT(dev_priv->dev)) {
+	if (HAS_PCH_SPLIT(&dev_priv->dev)) {
 		pp_reg = PCH_PP_CONTROL;
 		lvds_reg = PCH_LVDS;
 	} else {
@@ -1089,7 +1089,7 @@ static void assert_panel_unlocked(struct drm_i915_private *dev_priv,
 static void assert_cursor(struct drm_i915_private *dev_priv,
 			  enum pipe pipe, bool state)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	bool cur_state;
 
 	if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
@@ -1119,7 +1119,7 @@ void assert_pipe(struct drm_i915_private *dev_priv,
 	if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)
 		state = true;
 
-	if (!intel_display_power_enabled(dev_priv->dev,
+	if (!intel_display_power_enabled(&dev_priv->dev,
 				POWER_DOMAIN_TRANSCODER(cpu_transcoder))) {
 		cur_state = false;
 	} else {
@@ -1154,7 +1154,7 @@ static void assert_plane(struct drm_i915_private *dev_priv,
 static void assert_planes_disabled(struct drm_i915_private *dev_priv,
 				   enum pipe pipe)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	int reg, i;
 	u32 val;
 	int cur_pipe;
@@ -1184,7 +1184,7 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv,
 static void assert_sprites_disabled(struct drm_i915_private *dev_priv,
 				    enum pipe pipe)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	int reg, i;
 	u32 val;
 
@@ -1216,7 +1216,7 @@ static void assert_pch_refclk_enabled(struct drm_i915_private *dev_priv)
 	u32 val;
 	bool enabled;
 
-	if (HAS_PCH_LPT(dev_priv->dev)) {
+	if (HAS_PCH_LPT(&dev_priv->dev)) {
 		DRM_DEBUG_DRIVER("LPT does not has PCH refclk, skipping check\n");
 		return;
 	}
@@ -1248,7 +1248,7 @@ static bool dp_pipe_enabled(struct drm_i915_private *dev_priv,
 	if ((val & DP_PORT_EN) == 0)
 		return false;
 
-	if (HAS_PCH_CPT(dev_priv->dev)) {
+	if (HAS_PCH_CPT(&dev_priv->dev)) {
 		u32	trans_dp_ctl_reg = TRANS_DP_CTL(pipe);
 		u32	trans_dp_ctl = I915_READ(trans_dp_ctl_reg);
 		if ((trans_dp_ctl & TRANS_DP_PORT_SEL_MASK) != port_sel)
@@ -1266,7 +1266,7 @@ static bool hdmi_pipe_enabled(struct drm_i915_private *dev_priv,
 	if ((val & SDVO_ENABLE) == 0)
 		return false;
 
-	if (HAS_PCH_CPT(dev_priv->dev)) {
+	if (HAS_PCH_CPT(&dev_priv->dev)) {
 		if ((val & SDVO_PIPE_SEL_MASK_CPT) != SDVO_PIPE_SEL_CPT(pipe))
 			return false;
 	} else {
@@ -1282,7 +1282,7 @@ static bool lvds_pipe_enabled(struct drm_i915_private *dev_priv,
 	if ((val & LVDS_PORT_EN) == 0)
 		return false;
 
-	if (HAS_PCH_CPT(dev_priv->dev)) {
+	if (HAS_PCH_CPT(&dev_priv->dev)) {
 		if ((val & PORT_TRANS_SEL_MASK) != PORT_TRANS_SEL_CPT(pipe))
 			return false;
 	} else {
@@ -1297,7 +1297,7 @@ static bool adpa_pipe_enabled(struct drm_i915_private *dev_priv,
 {
 	if ((val & ADPA_DAC_ENABLE) == 0)
 		return false;
-	if (HAS_PCH_CPT(dev_priv->dev)) {
+	if (HAS_PCH_CPT(&dev_priv->dev)) {
 		if ((val & PORT_TRANS_SEL_MASK) != PORT_TRANS_SEL_CPT(pipe))
 			return false;
 	} else {
@@ -1315,7 +1315,7 @@ static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv,
 	     "PCH DP (0x%08x) enabled on transcoder %c, should be disabled\n",
 	     reg, pipe_name(pipe));
 
-	WARN(HAS_PCH_IBX(dev_priv->dev) && (val & DP_PORT_EN) == 0
+	WARN(HAS_PCH_IBX(&dev_priv->dev) && (val & DP_PORT_EN) == 0
 	     && (val & DP_PIPEB_SELECT),
 	     "IBX PCH dp port still using transcoder B\n");
 }
@@ -1328,7 +1328,7 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv,
 	     "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n",
 	     reg, pipe_name(pipe));
 
-	WARN(HAS_PCH_IBX(dev_priv->dev) && (val & SDVO_ENABLE) == 0
+	WARN(HAS_PCH_IBX(&dev_priv->dev) && (val & SDVO_ENABLE) == 0
 	     && (val & SDVO_PIPE_B_SELECT),
 	     "IBX PCH hdmi port still using transcoder B\n");
 }
@@ -1404,10 +1404,10 @@ static void vlv_enable_pll(struct intel_crtc *crtc)
 	assert_pipe_disabled(dev_priv, crtc->pipe);
 
 	/* No really, not for ILK+ */
-	BUG_ON(!IS_VALLEYVIEW(dev_priv->dev));
+	BUG_ON(!IS_VALLEYVIEW(&dev_priv->dev));
 
 	/* PLL is protected by panel, make sure we can write it */
-	if (IS_MOBILE(dev_priv->dev) && !IS_I830(dev_priv->dev))
+	if (IS_MOBILE(&dev_priv->dev) && !IS_I830(&dev_priv->dev))
 		assert_panel_unlocked(dev_priv, crtc->pipe);
 
 	I915_WRITE(reg, dpll);
@@ -1607,7 +1607,7 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
 static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
 					   enum pipe pipe)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t reg, val, pipeconf_val;
@@ -1636,7 +1636,7 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
 	val = I915_READ(reg);
 	pipeconf_val = I915_READ(PIPECONF(pipe));
 
-	if (HAS_PCH_IBX(dev_priv->dev)) {
+	if (HAS_PCH_IBX(&dev_priv->dev)) {
 		/*
 		 * make the BPC in transcoder be consistent with
 		 * that in pipeconf reg.
@@ -1647,7 +1647,7 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
 
 	val &= ~TRANS_INTERLACE_MASK;
 	if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK)
-		if (HAS_PCH_IBX(dev_priv->dev) &&
+		if (HAS_PCH_IBX(&dev_priv->dev) &&
 		    intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO))
 			val |= TRANS_LEGACY_INTERLACED_ILK;
 		else
@@ -1694,7 +1694,7 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv,
 static void ironlake_disable_pch_transcoder(struct drm_i915_private *dev_priv,
 					    enum pipe pipe)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	uint32_t reg, val;
 
 	/* FDI relies on the transcoder */
@@ -1765,7 +1765,7 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 	assert_cursor_disabled(dev_priv, pipe);
 	assert_sprites_disabled(dev_priv, pipe);
 
-	if (HAS_PCH_LPT(dev_priv->dev))
+	if (HAS_PCH_LPT(&dev_priv->dev))
 		pch_transcoder = TRANSCODER_A;
 	else
 		pch_transcoder = pipe;
@@ -1775,7 +1775,7 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 	 * a plane.  On ILK+ the pipe PLLs are integrated, so we don't
 	 * need the check.
 	 */
-	if (!HAS_PCH_SPLIT(dev_priv->dev))
+	if (!HAS_PCH_SPLIT(&dev_priv->dev))
 		if (dsi)
 			assert_dsi_pll_enabled(dev_priv);
 		else
@@ -1796,7 +1796,7 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 		return;
 
 	I915_WRITE(reg, val | PIPECONF_ENABLE);
-	intel_wait_for_vblank(dev_priv->dev, pipe);
+	intel_wait_for_vblank(&dev_priv->dev, pipe);
 }
 
 /**
@@ -1837,7 +1837,7 @@ static void intel_disable_pipe(struct drm_i915_private *dev_priv,
 		return;
 
 	I915_WRITE(reg, val & ~PIPECONF_ENABLE);
-	intel_wait_for_pipe_off(dev_priv->dev, pipe);
+	intel_wait_for_pipe_off(&dev_priv->dev, pipe);
 }
 
 /*
@@ -1883,7 +1883,7 @@ static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,
 
 	I915_WRITE(reg, val | DISPLAY_PLANE_ENABLE);
 	intel_flush_primary_plane(dev_priv, plane);
-	intel_wait_for_vblank(dev_priv->dev, pipe);
+	intel_wait_for_vblank(&dev_priv->dev, pipe);
 }
 
 /**
@@ -1913,7 +1913,7 @@ static void intel_disable_primary_plane(struct drm_i915_private *dev_priv,
 
 	I915_WRITE(reg, val & ~DISPLAY_PLANE_ENABLE);
 	intel_flush_primary_plane(dev_priv, plane);
-	intel_wait_for_vblank(dev_priv->dev, pipe);
+	intel_wait_for_vblank(&dev_priv->dev, pipe);
 }
 
 static bool need_vtd_wa(struct drm_device *dev)
@@ -3298,7 +3298,7 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc)
 		intel_put_shared_dpll(crtc);
 	}
 
-	if (HAS_PCH_IBX(dev_priv->dev)) {
+	if (HAS_PCH_IBX(&dev_priv->dev)) {
 		/* Ironlake PCH has a fixed PLL->PCH pipe mapping. */
 		i = (enum intel_dpll_id) crtc->pipe;
 		pll = &dev_priv->shared_dplls[i];
@@ -3485,7 +3485,7 @@ static void intel_crtc_load_lut(struct drm_crtc *crtc)
 	if (!crtc->enabled || !intel_crtc->active)
 		return;
 
-	if (!HAS_PCH_SPLIT(dev_priv->dev)) {
+	if (!HAS_PCH_SPLIT(&dev_priv->dev)) {
 		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
 			assert_dsi_pll_enabled(dev_priv);
 		else
@@ -3913,7 +3913,7 @@ g4x_fixup_plane(struct drm_i915_private *dev_priv, enum pipe pipe)
 
 		I915_WRITE(FW_BLC_SELF, fw_bcl_self & ~FW_BLC_SELF_EN);
 		I915_WRITE(CURCNTR(pipe), CURSOR_MODE_64_ARGB_AX);
-		intel_wait_for_vblank(dev_priv->dev, pipe);
+		intel_wait_for_vblank(&dev_priv->dev, pipe);
 		I915_WRITE(CURCNTR(pipe), cntl);
 		I915_WRITE(CURBASE(pipe), I915_READ(CURBASE(pipe)));
 		I915_WRITE(FW_BLC_SELF, fw_bcl_self);
@@ -4064,7 +4064,7 @@ static int intel_mode_max_pixclk(struct drm_i915_private *dev_priv,
 				 unsigned modeset_pipes,
 				 struct intel_crtc_config *pipe_config)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct intel_crtc *intel_crtc;
 	int max_pixclk = 0;
 
@@ -6462,7 +6462,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
 
 		ironlake_get_fdi_m_n_config(crtc, pipe_config);
 
-		if (HAS_PCH_IBX(dev_priv->dev)) {
+		if (HAS_PCH_IBX(&dev_priv->dev)) {
 			pipe_config->shared_dpll =
 				(enum intel_dpll_id) crtc->pipe;
 		} else {
@@ -6497,7 +6497,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
 
 static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct intel_ddi_plls *plls = &dev_priv->ddi_plls;
 	struct intel_crtc *crtc;
 	unsigned long irqflags;
@@ -6645,7 +6645,7 @@ void hsw_enable_pc8_work(struct work_struct *__work)
 	struct drm_i915_private *dev_priv =
 		container_of(to_delayed_work(__work), struct drm_i915_private,
 			     pc8.enable_work);
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	uint32_t val;
 
 	WARN_ON(!HAS_PC8(dev));
@@ -6686,7 +6686,7 @@ static void __hsw_enable_package_c8(struct drm_i915_private *dev_priv)
 
 static void __hsw_disable_package_c8(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	uint32_t val;
 
 	WARN_ON(!mutex_is_locked(&dev_priv->pc8.lock));
@@ -6727,7 +6727,7 @@ static void __hsw_disable_package_c8(struct drm_i915_private *dev_priv)
 
 void hsw_enable_package_c8(struct drm_i915_private *dev_priv)
 {
-	if (!HAS_PC8(dev_priv->dev))
+	if (!HAS_PC8(&dev_priv->dev))
 		return;
 
 	mutex_lock(&dev_priv->pc8.lock);
@@ -6737,7 +6737,7 @@ void hsw_enable_package_c8(struct drm_i915_private *dev_priv)
 
 void hsw_disable_package_c8(struct drm_i915_private *dev_priv)
 {
-	if (!HAS_PC8(dev_priv->dev))
+	if (!HAS_PC8(&dev_priv->dev))
 		return;
 
 	mutex_lock(&dev_priv->pc8.lock);
@@ -6747,7 +6747,7 @@ void hsw_disable_package_c8(struct drm_i915_private *dev_priv)
 
 static bool hsw_can_enable_package_c8(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct intel_crtc *crtc;
 	uint32_t val;
 
@@ -6777,7 +6777,7 @@ static void hsw_update_package_c8(struct drm_device *dev)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	bool allow;
 
-	if (!HAS_PC8(dev_priv->dev))
+	if (!HAS_PC8(&dev_priv->dev))
 		return;
 
 	if (!i915_enable_pc8)
@@ -6803,7 +6803,7 @@ done:
 
 static void hsw_package_c8_gpu_idle(struct drm_i915_private *dev_priv)
 {
-	if (!HAS_PC8(dev_priv->dev))
+	if (!HAS_PC8(&dev_priv->dev))
 		return;
 
 	mutex_lock(&dev_priv->pc8.lock);
@@ -6816,7 +6816,7 @@ static void hsw_package_c8_gpu_idle(struct drm_i915_private *dev_priv)
 
 static void hsw_package_c8_gpu_busy(struct drm_i915_private *dev_priv)
 {
-	if (!HAS_PC8(dev_priv->dev))
+	if (!HAS_PC8(&dev_priv->dev))
 		return;
 
 	mutex_lock(&dev_priv->pc8.lock);
@@ -10096,7 +10096,7 @@ static void ibx_pch_dpll_enable(struct drm_i915_private *dev_priv,
 static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv,
 				 struct intel_shared_dpll *pll)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct intel_crtc *crtc;
 
 	/* Make sure no transcoder isn't still depending on us. */
@@ -11473,7 +11473,7 @@ intel_display_capture_error_state(struct drm_device *dev)
 	}
 
 	error->num_transcoders = INTEL_INFO(dev)->num_pipes;
-	if (HAS_DDI(dev_priv->dev))
+	if (HAS_DDI(&dev_priv->dev))
 		error->num_transcoders++; /* Account for eDP. */
 
 	for (i = 0; i < error->num_transcoders; i++) {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7df5085..452abfe 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1490,7 +1490,7 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
 	dotclock = intel_dotclock_calculate(pipe_config->port_clock,
 					    &pipe_config->dp_m_n);
 
-	if (HAS_PCH_SPLIT(dev_priv->dev) && port != PORT_A)
+	if (HAS_PCH_SPLIT(&dev_priv->dev) && port != PORT_A)
 		ironlake_check_encoder_dotclock(pipe_config, dotclock);
 
 	pipe_config->adjusted_mode.crtc_clock = dotclock;
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 6db0d9d..afe7d4d 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -734,7 +734,7 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder,
 	else
 		dotclock = pipe_config->port_clock;
 
-	if (HAS_PCH_SPLIT(dev_priv->dev))
+	if (HAS_PCH_SPLIT(&dev_priv->dev))
 		ironlake_check_encoder_dotclock(pipe_config, dotclock);
 
 	pipe_config->adjusted_mode.crtc_clock = dotclock;
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index b1dc33f..dc7ecf1 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -84,7 +84,7 @@ static void gmbus_set_freq(struct drm_i915_private *dev_priv)
 {
 	int vco, gmbus_freq = 0, cdclk_div;
 
-	BUG_ON(!IS_VALLEYVIEW(dev_priv->dev));
+	BUG_ON(!IS_VALLEYVIEW(&dev_priv->dev));
 
 	vco = valleyview_get_vco(dev_priv);
 
@@ -126,7 +126,7 @@ static void intel_i2c_quirk_set(struct drm_i915_private *dev_priv, bool enable)
 	u32 val;
 
 	/* When using bit bashing for I2C, this bit needs to be set to 1 */
-	if (!IS_PINEVIEW(dev_priv->dev))
+	if (!IS_PINEVIEW(&dev_priv->dev))
 		return;
 
 	val = I915_READ(DSPCLK_GATE_D);
@@ -140,7 +140,7 @@ static void intel_i2c_quirk_set(struct drm_i915_private *dev_priv, bool enable)
 static u32 get_reserved(struct intel_gmbus *bus)
 {
 	struct drm_i915_private *dev_priv = bus->dev_priv;
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	u32 reserved = 0;
 
 	/* On most chips, these bits must be preserved in software. */
@@ -214,7 +214,7 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter)
 					       adapter);
 	struct drm_i915_private *dev_priv = bus->dev_priv;
 
-	intel_i2c_reset(dev_priv->dev);
+	intel_i2c_reset(&dev_priv->dev);
 	intel_i2c_quirk_set(dev_priv, true);
 	set_data(bus, 1);
 	set_clock(bus, 1);
@@ -275,7 +275,7 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv,
 	u32 gmbus2 = 0;
 	DEFINE_WAIT(wait);
 
-	if (!HAS_GMBUS_IRQ(dev_priv->dev))
+	if (!HAS_GMBUS_IRQ(&dev_priv->dev))
 		gmbus4_irq_en = 0;
 
 	/* Important: The hw handles only the first bit, so set only one! Since
@@ -312,7 +312,7 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
 
 #define C ((I915_READ_NOTRACE(GMBUS2 + reg_offset) & GMBUS_ACTIVE) == 0)
 
-	if (!HAS_GMBUS_IRQ(dev_priv->dev))
+	if (!HAS_GMBUS_IRQ(&dev_priv->dev))
 		return wait_for(C, 10);
 
 	/* Important: The hw handles only the first bit, so set only one! */
@@ -622,7 +622,7 @@ int intel_setup_gmbus(struct drm_device *dev)
 			goto err;
 	}
 
-	intel_i2c_reset(dev_priv->dev);
+	intel_i2c_reset(&dev_priv->dev);
 
 	return 0;
 
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 8bcb93a..4bda596 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -120,7 +120,7 @@ static void intel_lvds_get_config(struct intel_encoder *encoder,
 
 	dotclock = pipe_config->port_clock;
 
-	if (HAS_PCH_SPLIT(dev_priv->dev))
+	if (HAS_PCH_SPLIT(&dev_priv->dev))
 		ironlake_check_encoder_dotclock(pipe_config, dotclock);
 
 	pipe_config->adjusted_mode.crtc_clock = dotclock;
diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
index 3da259e..f89445a 100644
--- a/drivers/gpu/drm/i915/intel_opregion.c
+++ b/drivers/gpu/drm/i915/intel_opregion.c
@@ -509,7 +509,7 @@ static void asle_work(struct work_struct *work)
 		container_of(work, struct intel_opregion, asle_work);
 	struct drm_i915_private *dev_priv =
 		container_of(opregion, struct drm_i915_private, opregion);
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
 	u32 aslc_stat = 0;
 	u32 aslc_req;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 39c3819..b7734f5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2464,7 +2464,7 @@ static bool _ilk_disable_lp_wm(struct drm_i915_private *dev_priv,
 static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
 				struct ilk_wm_values *results)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct ilk_wm_values *previous = &dev_priv->wm.hw;
 	unsigned int dirty;
 	uint32_t val;
@@ -3052,14 +3052,14 @@ void gen6_set_rps(struct drm_device *dev, u8 val)
 
 void gen6_rps_idle(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 
 	mutex_lock(&dev_priv->rps.hw_lock);
 	if (dev_priv->rps.enabled) {
 		if (IS_VALLEYVIEW(dev))
-			valleyview_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
+			valleyview_set_rps(&dev_priv->dev, dev_priv->rps.min_delay);
 		else
-			gen6_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
+			gen6_set_rps(&dev_priv->dev, dev_priv->rps.min_delay);
 		dev_priv->rps.last_adj = 0;
 	}
 	mutex_unlock(&dev_priv->rps.hw_lock);
@@ -3067,14 +3067,14 @@ void gen6_rps_idle(struct drm_i915_private *dev_priv)
 
 void gen6_rps_boost(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 
 	mutex_lock(&dev_priv->rps.hw_lock);
 	if (dev_priv->rps.enabled) {
 		if (IS_VALLEYVIEW(dev))
-			valleyview_set_rps(dev_priv->dev, dev_priv->rps.max_delay);
+			valleyview_set_rps(&dev_priv->dev, dev_priv->rps.max_delay);
 		else
-			gen6_set_rps(dev_priv->dev, dev_priv->rps.max_delay);
+			gen6_set_rps(&dev_priv->dev, dev_priv->rps.max_delay);
 		dev_priv->rps.last_adj = 0;
 	}
 	mutex_unlock(&dev_priv->rps.hw_lock);
@@ -3340,7 +3340,7 @@ static void gen6_enable_rps(struct drm_device *dev)
 	I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
 
 	/* Check if we are enabling RC6 */
-	rc6_mode = intel_enable_rc6(dev_priv->dev);
+	rc6_mode = intel_enable_rc6(&dev_priv->dev);
 	if (rc6_mode & INTEL_RC6_ENABLE)
 		rc6_mask |= GEN6_RC_CTL_RC6_ENABLE;
 
@@ -3379,7 +3379,7 @@ static void gen6_enable_rps(struct drm_device *dev)
 	}
 
 	dev_priv->rps.power = HIGH_POWER; /* force a reset */
-	gen6_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
+	gen6_set_rps(&dev_priv->dev, dev_priv->rps.min_delay);
 
 	gen6_enable_rps_interrupts(dev);
 
@@ -3514,7 +3514,7 @@ static void valleyview_setup_pctx(struct drm_device *dev)
 		int pcbr_offset;
 
 		pcbr_offset = (pcbr & (~4095)) - dev_priv->mm.stolen_base;
-		pctx = i915_gem_object_create_stolen_for_preallocated(dev_priv->dev,
+		pctx = i915_gem_object_create_stolen_for_preallocated(&dev_priv->dev,
 								      pcbr_offset,
 								      I915_GTT_OFFSET_NONE,
 								      pctx_size);
@@ -3628,7 +3628,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
 			 vlv_gpu_freq(dev_priv, dev_priv->rps.rpe_delay),
 			 dev_priv->rps.rpe_delay);
 
-	valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
+	valleyview_set_rps(&dev_priv->dev, dev_priv->rps.rpe_delay);
 
 	gen6_enable_rps_interrupts(dev);
 
@@ -4238,7 +4238,7 @@ bool i915_gpu_turbo_disable(void)
 
 	dev_priv->ips.max_delay = dev_priv->ips.fstart;
 
-	if (!ironlake_set_drps(dev_priv->dev, dev_priv->ips.fstart))
+	if (!ironlake_set_drps(&dev_priv->dev, dev_priv->ips.fstart))
 		ret = false;
 
 out_unlock:
@@ -4384,7 +4384,7 @@ static void intel_gen6_powersave_work(struct work_struct *work)
 	struct drm_i915_private *dev_priv =
 		container_of(work, struct drm_i915_private,
 			     rps.delayed_resume_work.work);
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 
 	mutex_lock(&dev_priv->rps.hw_lock);
 
@@ -4675,7 +4675,7 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv)
 	reg |= GEN7_FF_VS_SCHED_HW;
 	reg |= GEN7_FF_DS_SCHED_HW;
 
-	if (IS_HASWELL(dev_priv->dev))
+	if (IS_HASWELL(&dev_priv->dev))
 		reg &= ~GEN7_FF_VS_REF_CNT_FFME;
 
 	I915_WRITE(GEN7_FF_THREAD_MODE, reg);
@@ -5177,7 +5177,7 @@ bool intel_display_power_enabled(struct drm_device *dev,
 
 static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	unsigned long irqflags;
 
 	/*
@@ -5213,7 +5213,7 @@ static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
 
 static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	enum pipe p;
 	unsigned long irqflags;
 
@@ -5346,7 +5346,7 @@ void i915_request_power_well(void)
 
 	dev_priv = container_of(hsw_pwr, struct drm_i915_private,
 				power_domains);
-	intel_display_power_get(dev_priv->dev, POWER_DOMAIN_AUDIO);
+	intel_display_power_get(&dev_priv->dev, POWER_DOMAIN_AUDIO);
 }
 EXPORT_SYMBOL_GPL(i915_request_power_well);
 
@@ -5360,7 +5360,7 @@ void i915_release_power_well(void)
 
 	dev_priv = container_of(hsw_pwr, struct drm_i915_private,
 				power_domains);
-	intel_display_power_put(dev_priv->dev, POWER_DOMAIN_AUDIO);
+	intel_display_power_put(&dev_priv->dev, POWER_DOMAIN_AUDIO);
 }
 EXPORT_SYMBOL_GPL(i915_release_power_well);
 
@@ -5485,7 +5485,7 @@ void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv)
 
 void intel_runtime_pm_get(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct device *device = &dev->pdev->dev;
 
 	if (!HAS_RUNTIME_PM(dev))
@@ -5497,7 +5497,7 @@ void intel_runtime_pm_get(struct drm_i915_private *dev_priv)
 
 void intel_runtime_pm_put(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct device *device = &dev->pdev->dev;
 
 	if (!HAS_RUNTIME_PM(dev))
@@ -5509,7 +5509,7 @@ void intel_runtime_pm_put(struct drm_i915_private *dev_priv)
 
 void intel_init_runtime_pm(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct device *device = &dev->pdev->dev;
 
 	dev_priv->pm.suspended = false;
@@ -5526,7 +5526,7 @@ void intel_init_runtime_pm(struct drm_i915_private *dev_priv)
 
 void intel_fini_runtime_pm(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
+	struct drm_device *dev = &dev_priv->dev;
 	struct device *device = &dev->pdev->dev;
 
 	if (!HAS_RUNTIME_PM(dev))
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 646fecf..447e33b 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -45,7 +45,7 @@ static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv)
 {
 	u32 gt_thread_status_mask;
 
-	if (IS_HASWELL(dev_priv->dev))
+	if (IS_HASWELL(&dev_priv->dev))
 		gt_thread_status_mask = GEN6_GT_THREAD_STATUS_CORE_MASK_HSW;
 	else
 		gt_thread_status_mask = GEN6_GT_THREAD_STATUS_CORE_MASK;
@@ -95,7 +95,7 @@ static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv,
 {
 	u32 forcewake_ack;
 
-	if (IS_HASWELL(dev_priv->dev) || IS_GEN8(dev_priv->dev))
+	if (IS_HASWELL(&dev_priv->dev) || IS_GEN8(&dev_priv->dev))
 		forcewake_ack = FORCEWAKE_ACK_HSW;
 	else
 		forcewake_ack = FORCEWAKE_MT_ACK;
@@ -114,7 +114,7 @@ static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv,
 		DRM_ERROR("Timed out waiting for forcewake to ack request.\n");
 
 	/* WaRsForcewakeWaitTC0:ivb,hsw */
-	if (INTEL_INFO(dev_priv->dev)->gen < 8)
+	if (INTEL_INFO(&dev_priv->dev)->gen < 8)
 		__gen6_gt_wait_for_thread_c0(dev_priv);
 }
 
@@ -152,7 +152,7 @@ static int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
 
 	/* On VLV, FIFO will be shared by both SW and HW.
 	 * So, we need to read the FREE_ENTRIES everytime */
-	if (IS_VALLEYVIEW(dev_priv->dev))
+	if (IS_VALLEYVIEW(&dev_priv->dev))
 		dev_priv->uncore.fifo_count =
 			__raw_i915_read32(dev_priv, GTFIFOCTL) &
 						GT_FIFO_FREE_ENTRIES_MASK;
@@ -378,7 +378,7 @@ void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv, int fw_engine)
 	intel_runtime_pm_get(dev_priv);
 
 	/* Redirect to VLV specific routine */
-	if (IS_VALLEYVIEW(dev_priv->dev))
+	if (IS_VALLEYVIEW(&dev_priv->dev))
 		return vlv_force_wake_get(dev_priv, fw_engine);
 
 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
@@ -398,7 +398,7 @@ void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv, int fw_engine)
 		return;
 
 	/* Redirect to VLV specific routine */
-	if (IS_VALLEYVIEW(dev_priv->dev))
+	if (IS_VALLEYVIEW(&dev_priv->dev))
 		return vlv_force_wake_put(dev_priv, fw_engine);
 
 
@@ -449,7 +449,7 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
 static void
 assert_device_not_suspended(struct drm_i915_private *dev_priv)
 {
-	WARN(HAS_RUNTIME_PM(dev_priv->dev) && dev_priv->pm.suspended,
+	WARN(HAS_RUNTIME_PM(&dev_priv->dev) && dev_priv->pm.suspended,
 	     "Device suspended\n");
 }
 
-- 
1.8.3.1

Re: [PATCH 4/5] drm: Add support for subclassing struct drm_device

[David Herrmann]

Hi

On Wed, Jan 8, 2014 at 7:31 PM, Damien Lespiau <damien.lespiau@intel.com> wrote:
> Currently, drivers are expected to allocate private data and attach it
> to dev_private in struct drm_device.
>
> This has the unfortunate property to require driver code to juggle
> between the pointer to struct drm_device and dev->dev_private instead of
> using the same pointer if they could embed the device structure.
>
> This patch enables drivers to declare the size of the device structure
> they want DRM core to create for them.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/drm_stub.c | 8 +++++++-
>  include/drm/drmP.h         | 8 ++++++++
>  2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
> index 98a33c580..161dd9a 100644
> --- a/drivers/gpu/drm/drm_stub.c
> +++ b/drivers/gpu/drm/drm_stub.c
> @@ -433,8 +433,14 @@ struct drm_device *drm_dev_alloc(struct drm_driver *driver,
>  {
>         struct drm_device *dev;
>         int ret;
> +       size_t device_struct_size;
>
> -       dev = kzalloc(sizeof(*dev), GFP_KERNEL);
> +       if (driver->device_struct_size)
> +               device_struct_size = driver->device_struct_size;
> +       else
> +               device_struct_size = sizeof(*dev);

How about a:
WARN_ON(driver->device_struct_size < sizeof(*dev))

> +
> +       dev = kzalloc(device_struct_size, GFP_KERNEL);

So the parent structure is expected to have "struct drm_device" at
offset 0? I'd rather like to see a "drm_dev_init()" alongside
drm_dev_alloc() similar to device_initialize().

Thanks
David

>         if (!dev)
>                 return NULL;
>
> diff --git a/include/drm/drmP.h b/include/drm/drmP.h
> index 6800c20..219b153 100644
> --- a/include/drm/drmP.h
> +++ b/include/drm/drmP.h
> @@ -996,6 +996,14 @@ struct drm_driver {
>         u32 driver_features;
>         /* size of the private data attached to a struct drm_buf */
>         int buf_priv_size;
> +       /*
> +        * DRM drivers can subclass struct drm_device to have their own device
> +        * structure to store private data. In this case, they need to declare
> +        * the size of the child structure (ie the structure embedding a struct
> +        * drm_device as first field) for the DRM core to allocate a big
> +        * enough device structure.
> +        */
> +       size_t device_struct_size;
>         const struct drm_ioctl_desc *ioctls;
>         int num_ioctls;
>         const struct file_operations *fops;
> --
> 1.8.3.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH 4/5] drm: Add support for subclassing struct drm_device

[Daniel Vetter]

On Wed, Jan 08, 2014 at 08:01:19PM +0100, David Herrmann wrote:
> Hi
> 
> On Wed, Jan 8, 2014 at 7:31 PM, Damien Lespiau <damien.lespiau@intel.com> wrote:
> > Currently, drivers are expected to allocate private data and attach it
> > to dev_private in struct drm_device.
> >
> > This has the unfortunate property to require driver code to juggle
> > between the pointer to struct drm_device and dev->dev_private instead of
> > using the same pointer if they could embed the device structure.
> >
> > This patch enables drivers to declare the size of the device structure
> > they want DRM core to create for them.
> >
> > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> > ---
> >  drivers/gpu/drm/drm_stub.c | 8 +++++++-
> >  include/drm/drmP.h         | 8 ++++++++
> >  2 files changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
> > index 98a33c580..161dd9a 100644
> > --- a/drivers/gpu/drm/drm_stub.c
> > +++ b/drivers/gpu/drm/drm_stub.c
> > @@ -433,8 +433,14 @@ struct drm_device *drm_dev_alloc(struct drm_driver *driver,
> >  {
> >         struct drm_device *dev;
> >         int ret;
> > +       size_t device_struct_size;
> >
> > -       dev = kzalloc(sizeof(*dev), GFP_KERNEL);
> > +       if (driver->device_struct_size)
> > +               device_struct_size = driver->device_struct_size;
> > +       else
> > +               device_struct_size = sizeof(*dev);
> 
> How about a:
> WARN_ON(driver->device_struct_size < sizeof(*dev))
> 
> > +
> > +       dev = kzalloc(device_struct_size, GFP_KERNEL);
> 
> So the parent structure is expected to have "struct drm_device" at
> offset 0? I'd rather like to see a "drm_dev_init()" alongside
> drm_dev_alloc() similar to device_initialize().

Yeah, I think for subclassing we want drivers in charge to kmalloc the
entire thing and embedded struct drm_device wherever they please to do so.
Adding struct_size stuff all over the place still forces us through the
midlayer ...

I'm trying to get there with my giant drm cleanup series (which contains
some of the same dev_priv_size cleanups like yours). Dunno whether it's
worth all to much to start embedding before we have that all ready since
imo the big value in demidlayering is that it allows us to fix up the
init/teardown sequence. That it also allows struct drm_device embedding is
kinda neat, but not my main goal.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

Re: [PATCH 4/5] drm: Add support for subclassing struct drm_device

[Damien Lespiau]

On Wed, Jan 08, 2014 at 09:26:51PM +0100, Daniel Vetter wrote:
> > So the parent structure is expected to have "struct drm_device" at
> > offset 0? I'd rather like to see a "drm_dev_init()" alongside
> > drm_dev_alloc() similar to device_initialize().
> 
> Yeah, I think for subclassing we want drivers in charge to kmalloc the
> entire thing and embedded struct drm_device wherever they please to do so.
> Adding struct_size stuff all over the place still forces us through the
> midlayer ...
> 
> I'm trying to get there with my giant drm cleanup series (which contains
> some of the same dev_priv_size cleanups like yours). Dunno whether it's
> worth all to much to start embedding before we have that all ready since
> imo the big value in demidlayering is that it allows us to fix up the
> init/teardown sequence. That it also allows struct drm_device embedding is
> kinda neat, but not my main goal.
> -Daniel

I'm not sure why would people want struct drm_device at a non-0 offset,
but in any case, if Daniel is already looking into this, let's scrap
that series. At least we know that it doesn't have to be a long term
plan and we can do it as soon as we want.

-- 
Damien

Re: [PATCH 4/5] drm: Add support for subclassing struct drm_device

[David Herrmann]

Hi

On Thu, Jan 9, 2014 at 1:11 PM, Damien Lespiau <damien.lespiau@intel.com> wrote:
> On Wed, Jan 08, 2014 at 09:26:51PM +0100, Daniel Vetter wrote:
>> > So the parent structure is expected to have "struct drm_device" at
>> > offset 0? I'd rather like to see a "drm_dev_init()" alongside
>> > drm_dev_alloc() similar to device_initialize().
>>
>> Yeah, I think for subclassing we want drivers in charge to kmalloc the
>> entire thing and embedded struct drm_device wherever they please to do so.
>> Adding struct_size stuff all over the place still forces us through the
>> midlayer ...
>>
>> I'm trying to get there with my giant drm cleanup series (which contains
>> some of the same dev_priv_size cleanups like yours). Dunno whether it's
>> worth all to much to start embedding before we have that all ready since
>> imo the big value in demidlayering is that it allows us to fix up the
>> init/teardown sequence. That it also allows struct drm_device embedding is
>> kinda neat, but not my main goal.
>> -Daniel
>
> I'm not sure why would people want struct drm_device at a non-0 offset,
> but in any case, if Daniel is already looking into this, let's scrap
> that series. At least we know that it doesn't have to be a long term
> plan and we can do it as soon as we want.

In case you embed multiple objects in your parent device and both have
this requirement, you're screwed. Obviously, this only works if at
most one of them has a ref-count, but see for instance the gem+ttm
combinations, which embed both, gem_object and ttm_bo in their private
bo.

Besides, it's more about clean code here than functionality. The code
doesn't get more complicated if we remove the restriction so lets use
the cleaner way similar to "struct device".

Thanks
David