From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 10/19] drm/i915: fix GEN7_ERR_INT init/reset code
Date: Wed, 22 Jan 2014 17:52:28 -0200 [thread overview]
Message-ID: <1390420357-23669-11-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1390420357-23669-1-git-send-email-przanoni@gmail.com>
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
Same as SERR_INT and the other IIR registers: reset on
preinstall/uninstall and WARN for non-zero values at postinstall. This
one also doesn't need double-clear.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 5b60de5..9a323a9 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2677,6 +2677,9 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
GEN5_IRQ_RESET(DE);
+ if (IS_GEN7(dev))
+ I915_WRITE(GEN7_ERR_INT, 0xffffffff);
+
gen5_gt_irq_preinstall(dev);
ibx_irq_preinstall(dev);
@@ -2843,7 +2846,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB |
DE_PIPEA_VBLANK_IVB);
- I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
+ GEN5_ASSERT_IIR_IS_ZERO(GEN7_ERR_INT);
} else {
display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
@@ -3051,7 +3054,7 @@ static void ironlake_irq_uninstall(struct drm_device *dev)
GEN5_IRQ_RESET(DE);
if (IS_GEN7(dev))
- I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
+ I915_WRITE(GEN7_ERR_INT, 0xffffffff);
GEN5_IRQ_RESET(GT);
if (INTEL_INFO(dev)->gen >= 6)
--
1.8.4.2
next prev parent reply other threads:[~2014-01-22 19:53 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-22 19:52 [PATCH 00/19] ILK+ interrupt improvements Paulo Zanoni
2014-01-22 19:52 ` [PATCH 01/19] drm/i915: add GEN5_IRQ_INIT macro Paulo Zanoni
2014-01-22 19:52 ` [PATCH 02/19] drm/i915: also use GEN5_IRQ_INIT with south display interrupts Paulo Zanoni
2014-01-22 19:52 ` [PATCH 03/19] drm/i915: use GEN8_IRQ_INIT on GEN5 Paulo Zanoni
2014-01-22 19:52 ` [PATCH 04/19] drm/i915: add GEN5_IRQ_FINI Paulo Zanoni
2014-01-22 19:52 ` [PATCH 05/19] drm/i915: don't forget to uninstall the PM IRQs Paulo Zanoni
2014-01-22 19:52 ` [PATCH 06/19] drm/i915: properly clear IIR at irq_uninstall on Gen5+ Paulo Zanoni
2014-01-22 19:52 ` [PATCH 07/19] drm/i915: add GEN5_IRQ_INIT Paulo Zanoni
2014-01-22 19:52 ` [PATCH 08/19] drm/i915: check if IIR is still zero at postinstall on Gen5+ Paulo Zanoni
2014-01-22 19:52 ` [PATCH 09/19] drm/i915: fix SERR_INT init/reset code Paulo Zanoni
2014-01-22 19:52 ` Paulo Zanoni [this message]
2014-01-22 19:52 ` [PATCH 11/19] drm/i915: fix open coded gen5_gt_irq_preinstall Paulo Zanoni
2014-01-22 19:52 ` [PATCH 12/19] drm/i915: extract ibx_irq_uninstall Paulo Zanoni
2014-01-22 19:52 ` [PATCH 13/19] drm/i915: call ibx_irq_uninstall from gen8_irq_uninstall Paulo Zanoni
2014-01-22 19:52 ` [PATCH 14/19] drm/i915: enable SDEIER later Paulo Zanoni
2014-01-22 19:52 ` [PATCH 15/19] drm/i915: remove ibx_irq_uninstall Paulo Zanoni
2014-01-22 19:52 ` [PATCH 16/19] drm/i915: add missing intel_hpd_irq_uninstall Paulo Zanoni
2014-01-22 19:52 ` [PATCH 17/19] drm/i915: add ironlake_irq_reset Paulo Zanoni
2014-01-22 19:52 ` [PATCH 18/19] drm/i915: add gen8_irq_reset Paulo Zanoni
2014-01-22 19:52 ` [PATCH 19/19] drm/i915: only enable HWSTAM interrupts on postinstall on ILK+ Paulo Zanoni
2014-01-22 21:08 ` [PATCH 00/19] ILK+ interrupt improvements Daniel Vetter
2014-01-23 6:07 ` Jani Nikula
2014-01-23 8:22 ` Daniel Vetter
2014-01-29 20:08 ` [PATCH 20/19] drm/i915: add POSTING_READs to the IRQ init/reset macros Paulo Zanoni
-- strict thread matches above, loose matches on Subject: below --
2014-04-01 18:37 [PATCH 00/19] ILK+ interrupt improvements, v3 Paulo Zanoni
2014-04-01 18:37 ` [PATCH 10/19] drm/i915: fix GEN7_ERR_INT init/reset code Paulo Zanoni
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