From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 04/19] drm/i915: add GEN5_IRQ_FINI Date: Wed, 22 Jan 2014 17:52:22 -0200 Message-ID: <1390420357-23669-5-git-send-email-przanoni@gmail.com> References: <1390420357-23669-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-yh0-f47.google.com (mail-yh0-f47.google.com [209.85.213.47]) by gabe.freedesktop.org (Postfix) with ESMTP id 03E3A105795 for ; Wed, 22 Jan 2014 11:53:20 -0800 (PST) Received: by mail-yh0-f47.google.com with SMTP id c41so330002yho.6 for ; Wed, 22 Jan 2014 11:53:20 -0800 (PST) In-Reply-To: <1390420357-23669-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni Same as the _INIT macro: the goal is to reuse the GEN8 macros, but there are still some slight differences. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_irq.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 8fdbb5b..d58c392 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -103,6 +103,11 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */ I915_WRITE(type##IIR, 0xffffffff); \ } while (0) +#define GEN5_IRQ_FINI(type) do { \ + I915_WRITE(type##IMR, 0xffffffff); \ + I915_WRITE(type##IER, 0); \ + I915_WRITE(type##IIR, I915_READ(type##IIR)); \ +} while (0) /* For display hotplug interrupt */ static void @@ -3060,22 +3065,16 @@ static void ironlake_irq_uninstall(struct drm_device *dev) I915_WRITE(HWSTAM, 0xffffffff); - I915_WRITE(DEIMR, 0xffffffff); - I915_WRITE(DEIER, 0x0); - I915_WRITE(DEIIR, I915_READ(DEIIR)); + GEN5_IRQ_FINI(DE); if (IS_GEN7(dev)) I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT)); - I915_WRITE(GTIMR, 0xffffffff); - I915_WRITE(GTIER, 0x0); - I915_WRITE(GTIIR, I915_READ(GTIIR)); + GEN5_IRQ_FINI(GT); if (HAS_PCH_NOP(dev)) return; - I915_WRITE(SDEIMR, 0xffffffff); - I915_WRITE(SDEIER, 0x0); - I915_WRITE(SDEIIR, I915_READ(SDEIIR)); + GEN5_IRQ_FINI(SDE); if (HAS_PCH_CPT(dev) || HAS_PCH_LPT(dev)) I915_WRITE(SERR_INT, I915_READ(SERR_INT)); } -- 1.8.4.2