From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: [PATCH 7/9] drm/i915/bdw: RPS frequency bits are the same as HSW Date: Tue, 28 Jan 2014 20:25:45 -0800 Message-ID: <1390969547-1018-9-git-send-email-benjamin.widawsky@intel.com> References: <1390969547-1018-1-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 369BB11DFF0 for ; Tue, 28 Jan 2014 20:25:58 -0800 (PST) In-Reply-To: <1390969547-1018-1-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Intel GFX , intel-gfx@freedesktop.org Cc: Ben Widawsky , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/intel_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 34cc898..deaaaf2 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3016,7 +3016,7 @@ void gen6_set_rps(struct drm_device *dev, u8 val) gen6_set_rps_thresholds(dev_priv, val); - if (IS_HASWELL(dev)) + if (IS_HASWELL(dev) || IS_BROADWELL(dev)) I915_WRITE(GEN6_RPNSWREQ, HSW_FREQUENCY(val)); else -- 1.8.5.3