From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH] drm/i915: Fix correct FIFO size for Baytrail Date: Wed, 12 Feb 2014 19:24:00 +0200 Message-ID: <1392225840.3028.1.camel@intelbox> References: <1391785992-28063-1-git-send-email-vijay.a.purushothaman@intel.com> <20140207155816.GY3891@intel.com> <20140207185847.GE17001@phenom.ffwll.local> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1443056202==" Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id BCB35F9D27 for ; Wed, 12 Feb 2014 09:24:05 -0800 (PST) In-Reply-To: <20140207185847.GE17001@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics List-Id: intel-gfx@lists.freedesktop.org --===============1443056202== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-AYC2Wj4cL2CGg3tXJI8D" --=-AYC2Wj4cL2CGg3tXJI8D Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2014-02-07 at 19:58 +0100, Daniel Vetter wrote: > On Fri, Feb 07, 2014 at 05:58:16PM +0200, Ville Syrj=C3=A4l=C3=A4 wrote: > > On Fri, Feb 07, 2014 at 08:43:12PM +0530, Vijay Purushothaman wrote: > > > B-spec says the FIFO total size is 512. So fix this to 512. > > >=20 > > > Signed-off-by: Vijay Purushothaman > > > --- > > > drivers/gpu/drm/i915/i915_reg.h | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > >=20 > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i= 915_reg.h > > > index cc3ea04..fb73031 100644 > > > --- a/drivers/gpu/drm/i915/i915_reg.h > > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > > @@ -3395,7 +3395,7 @@ > > > #define I915_FIFO_LINE_SIZE 64 > > > #define I830_FIFO_LINE_SIZE 32 > > > =20 > > > -#define VALLEYVIEW_FIFO_SIZE 255 > > > +#define VALLEYVIEW_FIFO_SIZE 511 > > > #define G4X_FIFO_SIZE 127 > > > #define I965_FIFO_SIZE 512 > > > #define I945_FIFO_SIZE 127 > >=20 > > Reviewed-by: Ville Syrj=C3=A4l=C3=A4 >=20 > Queued for -next, thanks for the patch. > -Daniel This breaks DP on my BYT, I get bad flicker with it. Reverting only this one fixes the issue. --Imre --=-AYC2Wj4cL2CGg3tXJI8D Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJS+64wAAoJEORIIAnNuWDF93cH+wSM+IinjqYp0B6lQJjQeR5O pE0Lg15LNfEGkXj+vBRqjomkz9Ykfh/wAk92oMTsgfcC60VuLqf5o0//BO5YcZhL gX3mvtpKdNneH3K9axunu+dPrzjGezSz5J4hiQrqYFFgdqu0sbEXjj7rKckdXKWP TDrGYxb8m9qhVfX0IxN9NhrqJX2AEcchibnNb3aySR58ZN915gmcS005dWxweCPe 0r/TpWlg8JRJsfR1DLsJg5o9e82LIPXC9S7edgBE1oSi+nXGQ6EFp/EE59V/JxyG QViDbJP7MATxb9QJc+EmJcYGRQgQCNrQuzggovjotTbFXSRW+L1EpJj4UroSKx4= =qYlc -----END PGP SIGNATURE----- --=-AYC2Wj4cL2CGg3tXJI8D-- --===============1443056202== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1443056202==--