From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH v2 9/5] drm/i915: Draw a picture about video timings Date: Thu, 20 Feb 2014 15:42:55 +0200 Message-ID: <1392903775.2650.5.camel@intelbox> References: <1392725061-30144-3-git-send-email-ville.syrjala@linux.intel.com> <1392894851-1961-1-git-send-email-ville.syrjala@linux.intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0489644490==" Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id B344CFB269 for ; Thu, 20 Feb 2014 05:43:01 -0800 (PST) In-Reply-To: <1392894851-1961-1-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0489644490== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-J3qHkkz8NlK2hbHbQ4Ba" --=-J3qHkkz8NlK2hbHbQ4Ba Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2014-02-20 at 13:14 +0200, ville.syrjala@linux.intel.com wrote: > From: Ville Syrj=C3=A4l=C3=A4 >=20 > The docs are a bit lacking when it comes to describing when certain > timing related events occur in the hardware. Draw a picture which > tries to capture the most important ones. >=20 > v2: Clarify a few details (Imre) >=20 > Signed-off-by: Ville Syrj=C3=A4l=C3=A4 > --- > drivers/gpu/drm/i915/i915_irq.c | 49 +++++++++++++++++++++++++++++++++++= ++++++ > 1 file changed, 49 insertions(+) >=20 > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_= irq.c > index 40adce0..ed0df3e 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -625,6 +625,55 @@ i915_pipe_enabled(struct drm_device *dev, int pipe) > } > } > =20 > +/* > + * This timing diagram depicts the video signal in and > + * around the vertical blanking period. > + * > + * Assumptions about the fictitious mode used in this example: > + * vblank_start >=3D 3 > + * vsync_start =3D vblank_start + 1 > + * vsync_end =3D vblank_start + 2 > + * vtotal =3D vblank_start + 3 > + * > + * start of vblank: > + * latch double buffered registers > + * increment frame counter (ctg+) > + * generate start of vblank interrupt (gen4+) > + * | > + * | frame start: > + * | generate frame start interrupt (aka. vblank inte= rrupt) (gmch) > + * | may be shifted forward 1-3 extra lines via PIPEC= ONF > + * | | > + * | | start of vsync: > + * | | generate vsync interrupt > + * | | | > + * ___xxxx___ ___xxxx___ ___xxxx___ ___xxxx___ ___xxxx___ = ___ > + * . \hs/ . \hs/ \hs/ \hs/ . \hs= / > + * ----va---> <-----------------vb--------------------> <--------va-----= ---- > + * | | <----vs-----> | > + * -vbs-----> <---vbs+1---> <---vbs+2---> <-----0-----> <-----1-----> <-= --2- (scanline counter gen2) > + * -vbs-2---> <---vbs-1---> <---vbs-----> <---vbs+1---> <---vbs+2---> <-= --0- (scanline counter gen3+) > + * | | | > + * last visible pixel first visi= ble pixel > + * | increment = frame counter (gen3/4) > + * pixel counter =3D vblank_start * htotal pixel co= unter =3D 0 (gen3/4) > + * > + * x =3D horizontal active > + * _ =3D horizontal blanking > + * hs =3D horizontal sync > + * va =3D vertical active > + * vb =3D vertical blanking > + * vs =3D vertical sync > + * vbs =3D vblank_start (number) > + * > + * Summary: > + * - most events happen at the start of horizontal sync > + * - frame start happens at the start of horizontal blank, 1-4 lines > + * (depending on PIPECONF settings) after the start of vblank > + * - gen3/4 pixel and frame counter are synchronized with the start > + * of horizontal active on the first line of vertical active A nice description that I haven't found in any docs, so: Acked-by: Imre Deak > + */ > + > static u32 i8xx_get_vblank_counter(struct drm_device *dev, int pipe) > { > /* Gen2 doesn't have a hardware frame counter */ --=-J3qHkkz8NlK2hbHbQ4Ba Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTBgZfAAoJEORIIAnNuWDFVSsIAJbY2oZspW9iyd8n/3KOg8Fy 0sIr+rxL80oPyfS0Mr3MQf7rtIWNcLK6EhmaYi2e0ldkXo5i70Yq/DEs8oMmDBdI nUfu8mgKCgCT4T39uU/wDhI1eTVEcdRZM+TE9953obuRrzI7aOdBZXzKg+qUuKb1 9pd3q99idgQgP8fXtBPgbQng27r5uc12uYYF6hbnpP0bB9SDHdWDoKFVP2fVTk4N imdYNgXmadEg0llkwo224UHlcxklKbtMEa0vU7eNBUgVZWY3uEWJ/tt5Kh5ParFb PPV2GciF2OXHwvnuEewopEdI47jfW00j7osIMKFyLyPgPSi4PGUqMdNa2vzQWdg= =lfWu -----END PGP SIGNATURE----- --=-J3qHkkz8NlK2hbHbQ4Ba-- --===============0489644490== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0489644490==--