From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 08/19] drm/i915: get port power domain in connector detect Date: Mon, 24 Feb 2014 13:56:20 +0200 Message-ID: <1393242980.13131.47.camel@intelbox> References: <1392674540-10915-1-git-send-email-imre.deak@intel.com> <1392674540-10915-9-git-send-email-imre.deak@intel.com> <20140219123508.GD3852@intel.com> <1392813598.19792.1.camel@intelbox> <20140220113337.41a117a3@jbarnes-desktop> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0644294041==" Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id BE2D9FA02D for ; Mon, 24 Feb 2014 03:56:40 -0800 (PST) In-Reply-To: <20140220113337.41a117a3@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0644294041== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-veKSDTGc8fzKfdCs6CvT" --=-veKSDTGc8fzKfdCs6CvT Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2014-02-20 at 11:33 -0800, Jesse Barnes wrote: > On Wed, 19 Feb 2014 14:39:58 +0200 > Imre Deak wrote: >=20 > > On Wed, 2014-02-19 at 14:35 +0200, Ville Syrj=C3=A4l=C3=A4 wrote: > > > On Tue, Feb 18, 2014 at 12:02:09AM +0200, Imre Deak wrote: > > > > The connector detect and get_mode handlers need to access the port > > > > specific HW blocks to read the EDID etc. Get/put the port power dom= ains > > > > around these handlers. > > > >=20 > > > > Signed-off-by: Imre Deak > > > > --- > > > > drivers/gpu/drm/i915/intel_crt.c | 42 ++++++++++++++++++++++++++++= ++++-------- > > > > drivers/gpu/drm/i915/intel_dp.c | 16 ++++++++++++--- > > > > drivers/gpu/drm/i915/intel_dsi.c | 13 ++++++++++++- > > >=20 > > > And what about HDMI? > >=20 > > Good catch, I missed that one. >=20 > I wonder if we can catch bits like that using our display reg base > bits. We could have a platform specific power check for each block to > do some basic sanity checking on whether the appropriate well was > enabled and squak if not. >=20 > I just know we'll miss this more than once, and I'm not sure if the > unclaimed reg stuff will save us on all platforms. Yea, good idea. The register->power well mapping could be part of the platform specific power well struct and we could assert on the SW state of the well being 'enabled'. --Imre --=-veKSDTGc8fzKfdCs6CvT Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTCzNkAAoJEORIIAnNuWDFXIsH/2YYJ41kINskAj1eXrkF1ie9 YrO8oGXyA3T0SoXEGfy5ndKWtgfpcCgkqcg93UHRBOiYpzz2gSvV7JuGhJZBKUXY Oqef1CgqLr7SqDRjgsIjcumKwfIQdr/IUhmmpqx/z06eexnjbqnupp/gpZsz6HPg 2KjWA2VrsoY4TuNkEU51+q655kgwLw6BEvONVK2Iiy7DprAqOxyDvAJ8V0dca6fS 6s9nS14d4hrCPLCPAfhDEFDZ5pJeZKjXh988vzA/4PvpNDBizNYdvs6paPM5gkiz 8XIqOOw7vo9+bQe3zpoA8GJ2igOuc1f/lG+BcKwjkSwTDs7b5AwwYgfi+fgFrqs= =DLpO -----END PGP SIGNATURE----- --=-veKSDTGc8fzKfdCs6CvT-- --===============0644294041== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0644294041==--