From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 14/19] drm/i915: switch order of power domain init wrt. irq install Date: Mon, 24 Feb 2014 15:23:23 +0200 Message-ID: <1393248203.13131.87.camel@intelbox> References: <1392674540-10915-1-git-send-email-imre.deak@intel.com> <1392674540-10915-15-git-send-email-imre.deak@intel.com> <20140220114810.1452fd50@jbarnes-desktop> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0701378071==" Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 4DAD5FA0C3 for ; Mon, 24 Feb 2014 05:23:28 -0800 (PST) In-Reply-To: <20140220114810.1452fd50@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0701378071== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-bOZfSy2ew7nw5UJHrPPl" --=-bOZfSy2ew7nw5UJHrPPl Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2014-02-20 at 11:48 -0800, Jesse Barnes wrote: > On Tue, 18 Feb 2014 00:02:15 +0200 > Imre Deak wrote: >=20 > > On VLV at least the display IRQ register access and functionality > > depends on its power well to be on, so move the power domain HW init > > before we install the IRQs. > >=20 > > Signed-off-by: Imre Deak > > --- > > drivers/gpu/drm/i915/i915_dma.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > >=20 > > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i91= 5_dma.c > > index 8177c17..f8f7a59 100644 > > --- a/drivers/gpu/drm/i915/i915_dma.c > > +++ b/drivers/gpu/drm/i915/i915_dma.c > > @@ -1321,12 +1321,12 @@ static int i915_load_modeset_init(struct drm_de= vice *dev) > > if (ret) > > goto cleanup_vga_switcheroo; > > =20 > > + intel_power_domains_init_hw(dev_priv); > > + > > ret =3D drm_irq_install(dev); > > if (ret) > > goto cleanup_gem_stolen; > > =20 > > - intel_power_domains_init_hw(dev_priv); > > - > > /* Important: The output setup functions called by modeset_init need > > * working irqs for e.g. gmbus and dp aux transfers. */ > > intel_modeset_init(dev); >=20 > Reviewed-by: Jesse Barnes >=20 > That said, this was always one part of the PM code that confused me and > caused some refcounts to get messed up last time I worked on it. > > I think it would be better to not treat init specially, and let the > power wells get turned on and off through normal power well get/put > calls during init and resume. I agree this is the ideal way and we should move towards that. Atm, we have intel_display_set_init_power() for init and resume which is not so nice, but it should do the right thing. > It's a bit noisy, power wise, but ultimately it might make for clearer > code and one less special case. Yep and also give some power saving. --Imre --=-bOZfSy2ew7nw5UJHrPPl Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTC0fLAAoJEORIIAnNuWDFJPkH/Rq67oGj3mVxozLF/ykNWgKt m9od/72OMoHzbcfiDgVAaY8PmVItDhWIwhCz/4XVqNQuG9e360m17yJVpY6REpir A8TEKKXDNgLuOAkcwMkqjhVkcDe7NpnvyyKf+8WN63iEz199TI9WE+Yk5AvFgZdT 57qidLTLDGuNwyacshd1swW/4P6e28d6j025+tNz0wg5ITUBgg0URkzNuaNYISFr qX1UIOfE+d/fkXYs3EWRL5oXWWwbks5X1Z7E10vgomaduN0mbCVYVUVrDIs+0QJq Pyh7dTZ0+3Q3LMy5weK+3hjS9VY5ceXErc1qOp+gQ0j4oI8xH0UGdrpT0+6NwUI= =qAno -----END PGP SIGNATURE----- --=-bOZfSy2ew7nw5UJHrPPl-- --===============0701378071== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0701378071==--