From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 01/19] drm/i915: rename modeset_update_power_wells Date: Thu, 27 Feb 2014 15:44:28 +0200 Message-ID: <1393508668.3479.1.camel@intelbox> References: <1387461309-2756-1-git-send-email-przanoni@gmail.com> <1387461309-2756-2-git-send-email-przanoni@gmail.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1879373661==" Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 69AA8FB707 for ; Thu, 27 Feb 2014 05:44:30 -0800 (PST) In-Reply-To: <1387461309-2756-2-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org --===============1879373661== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-fcVQfdgf2adLhvCM6l50" --=-fcVQfdgf2adLhvCM6l50 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2013-12-19 at 11:54 -0200, Paulo Zanoni wrote: > From: Paulo Zanoni >=20 > To modeset_update_crtc_power_domains, since this function is > responsible for updating all the power domains of all CRTCs after a > modeset. In the future we should also run this function on all > platforms, not just Haswell. >=20 > Signed-off-by: Paulo Zanoni Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_display.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index 4d1357a..c661423 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -6860,7 +6860,7 @@ void intel_display_set_init_power(struct drm_device= *dev, bool enable) > dev_priv->power_domains.init_power_on =3D enable; > } > =20 > -static void modeset_update_power_wells(struct drm_device *dev) > +static void modeset_update_crtc_power_domains(struct drm_device *dev) > { > unsigned long pipe_domains[I915_MAX_PIPES] =3D { 0, }; > struct intel_crtc *crtc; > @@ -6897,7 +6897,7 @@ static void modeset_update_power_wells(struct drm_d= evice *dev) > =20 > static void haswell_modeset_global_resources(struct drm_device *dev) > { > - modeset_update_power_wells(dev); > + modeset_update_crtc_power_domains(dev); > hsw_update_package_c8(dev); > } > =20 --=-fcVQfdgf2adLhvCM6l50 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTD0E8AAoJEORIIAnNuWDF3RsH/15N/Kg7daWads7u3YC8YBHK 3U5MbyZjeWL4iTjUrG8ocqVMJZnL2zFcDZhsZw42WXkW2gww7wST2B+jdzJgo0MO F7OxfH7rA9KJCcDoUKdU2V0KhTsrIdhhcxCY3TUKutpYqlJuEQQ/jChA/AGUNtIU JfhpUZCVsM13/54Q9ciy1nRI4+kukoyPi6OUlyj05LKJW0owo50jJbt7nS62fak6 HlwmuX5IHaQ5KaifCXAsJTz4xtdEog3SO7yojtjZT0MDf3C6Y+d67ioBCGbI7Fa5 mPnZQoQfSosiDU8fdvBUhxPuEBcOTYRWZxN9v+n7T1LQNWoxzKBNH8613Y2bZkA= =3A9j -----END PGP SIGNATURE----- --=-fcVQfdgf2adLhvCM6l50-- --===============1879373661== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1879373661==--