From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 04/11] drm/i915: get runtime PM at intel_set_mode Date: Fri, 28 Feb 2014 15:07:18 +0200 Message-ID: <1393592838.3479.45.camel@intelbox> References: <1393001548-2883-1-git-send-email-przanoni@gmail.com> <1393001548-2883-5-git-send-email-przanoni@gmail.com> <1393241020.13131.22.camel@intelbox> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0620145248==" Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id A467BFA75D for ; Fri, 28 Feb 2014 05:07:23 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Paulo Zanoni Cc: Intel Graphics Development , Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org --===============0620145248== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-PDS9ex0t0GPfwx+nfekL" --=-PDS9ex0t0GPfwx+nfekL Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2014-02-24 at 11:34 -0300, Paulo Zanoni wrote: > 2014-02-24 8:23 GMT-03:00 Imre Deak : > > On Fri, 2014-02-21 at 13:52 -0300, Paulo Zanoni wrote: > >> From: Paulo Zanoni > >> > >> Otherwise, when we run intel_modeset_check_state we may already be > >> runtime suspended, and our state checking code will read registers > >> while the device is suspended. This can only happen if your > >> autosuspend_delay_ms is low (not the default 10s). > >> > >> Signed-off-by: Paulo Zanoni > >> --- > >> drivers/gpu/drm/i915/intel_display.c | 5 +++++ > >> 1 file changed, 5 insertions(+) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i9= 15/intel_display.c > >> index 10ec401..c64fb7f 100644 > >> --- a/drivers/gpu/drm/i915/intel_display.c > >> +++ b/drivers/gpu/drm/i915/intel_display.c > >> @@ -9746,13 +9746,18 @@ static int intel_set_mode(struct drm_crtc *crt= c, > >> struct drm_display_mode *mode, > >> int x, int y, struct drm_framebuffer *fb) > >> { > >> + struct drm_device *dev =3D crtc->dev; > >> + struct drm_i915_private *dev_priv =3D dev->dev_private; > >> int ret; > >> > >> + intel_runtime_pm_get(dev_priv); > >> + > >> ret =3D __intel_set_mode(crtc, mode, x, y, fb); > >> > >> if (ret =3D=3D 0) > >> intel_modeset_check_state(crtc->dev); > >> > >> + intel_runtime_pm_put(dev_priv); > >> return ret; > >> } > > > > Ideally these should be done as part of a power domain get/put as some > > platforms will need to turn on some power wells too and on that path we > > do anyway a runtime PM get/put. > > > > In the latest VLV power domain support patchset [1] I added the power > > domain get/put and state check to places I thought necessary. I haven't > > tested it on HSW but afaics the ones added for the HW state readout cod= e > > would solve the issue you describe here. >=20 > Yes. I just quickly read the patches, and they seem to try to solve > this problem. Due to the reasons you wrote on the first paragraph, I > think in the long term we want the power domains solution. But as I > mentioned in the cover letter, this series contains bug fixes and > maybe we want them on -fixes and even stable Kernels, so maybe we want > to merge this patch, then later merge the code that uses power > domains, then remove the runitme_pm_get calls and leave just the power > domain calls? I'm not sure. Ok, I can rebase my patchset based on the above. Note that runtime PM was enabled post 3.13, so this fix is needed for -fixes, but not for stable kernels. The same goes for patch 5/11. --Imre --=-PDS9ex0t0GPfwx+nfekL Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTEIoGAAoJEORIIAnNuWDFdJoH/RvJGtWqeskF9Xi/F48UBlCk umAhp2SVU8OPx8QFzbUfvL/6nfJms+JrpBqNdyDnI+5ch9mwhYUuNL3sar5N9OMw Ir9rDcgz9D5O1EnHxTFgyh74sl9Cm8OlDJnATO+8W/ecM39yiginUpWNoFre0kxd rZnpeKXJN3UNTkYD8MFUNAe5CQk2zNeRmPL4KhF4gd505dClfUlsf2xdzsXVL6HN Q/wxkvaUj3yFw7/vYGnIFoyygeQj63+f1XATaqqB91s/3/oUo9YS5ig4OYuz4og8 FPDKCYxBOd07leqZecaZm8wUjP/OQdyxVKfaT1n8t2pyIhskHWJBZqj8Ul1rvPs= =FybE -----END PGP SIGNATURE----- --=-PDS9ex0t0GPfwx+nfekL-- --===============0620145248== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0620145248==--