From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 09/11] drm/i915: assert force wake is disabled when we runtime suspend Date: Fri, 28 Feb 2014 16:32:44 +0200 Message-ID: <1393597964.3479.60.camel@intelbox> References: <1393001548-2883-1-git-send-email-przanoni@gmail.com> <1393001548-2883-10-git-send-email-przanoni@gmail.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0659300964==" Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id AD2FCFA577 for ; Fri, 28 Feb 2014 06:33:28 -0800 (PST) In-Reply-To: <1393001548-2883-10-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org --===============0659300964== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-2pzwJTcdcRyyooKM5wFC" --=-2pzwJTcdcRyyooKM5wFC Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2014-02-21 at 13:52 -0300, Paulo Zanoni wrote: > From: Paulo Zanoni >=20 > Just to be sure... >=20 > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/i915_drv.c | 1 + > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_uncore.c | 8 ++++++++ > 3 files changed, 10 insertions(+) >=20 > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_= drv.c > index 2d05d7c..0c1e9e4 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -847,6 +847,7 @@ static int i915_runtime_suspend(struct device *device= ) > struct drm_i915_private *dev_priv =3D dev->dev_private; > =20 > WARN_ON(!HAS_RUNTIME_PM(dev)); > + assert_force_wake_inactive(dev_priv); > =20 > DRM_DEBUG_KMS("Suspending device\n"); > =20 > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_= drv.h > index 2a2a3a9..bc81c86 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2604,6 +2604,7 @@ extern void intel_display_print_error_state(struct = drm_i915_error_state_buf *e, > */ > void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv, int fw_en= gine); > void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv, int fw_en= gine); > +void assert_force_wake_inactive(struct drm_i915_private *dev_priv); > =20 > int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u= 32 *val); > int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, = u32 val); > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/i= ntel_uncore.c > index 212de36..c3a4d6f 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -427,6 +427,14 @@ void gen6_gt_force_wake_put(struct drm_i915_private = *dev_priv, int fw_engine) > intel_runtime_pm_put(dev_priv); > } > =20 > +void assert_force_wake_inactive(struct drm_i915_private *dev_priv) > +{ > + if (!dev_priv->uncore.funcs.force_wake_get) > + return; > + > + WARN_ON(dev_priv->uncore.forcewake_count > 0); > +} > + As patch 8/11, this one would also trigger without 3/11, so it should be applied after that. You could also check the VLV forcewake refcounts, but I'm ok if you add that later. With the patch order fixed: Reviewed-by: Imre Deak > /* We give fast paths for the really cool registers */ > #define NEEDS_FORCE_WAKE(dev_priv, reg) \ > ((reg) < 0x40000 && (reg) !=3D FORCEWAKE) --=-2pzwJTcdcRyyooKM5wFC Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTEJ4MAAoJEORIIAnNuWDFjTMIAK15gCMRPtCCFIwibahnW9wu 5o/XaIXkcv42uDxCYTUXdfJpkeHqoSzYCnAGr6JuU2gWSEd/HBG0r0ZMhKLNnzea ajSu1jJMee1nKCGRw0YEf2fbM7E3RvmYCIfMe03iRnNQ1X3lHAow7+dyVZNDAn05 PohIlMJo6dDB8WGaLA2na4jU3eE0GIV24e9ORr65HKaJETPqNaGwfKEV1JXVI+nB 1albRbwqjPENFEXB6mavKfdVhY9w3S4qzxK5vRgwref2yeAa3vrgg9zXA3NIxoJ9 TYqUAOJ72yJKwjlmZEYgKSj/3evtupBxiLjiJTCoCjhLp5oZe+116AslUyIy2ME= =Hf/p -----END PGP SIGNATURE----- --=-2pzwJTcdcRyyooKM5wFC-- --===============0659300964== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0659300964==--