From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 11/11] drm/i915: assert we're not runtime suspended when writing registers Date: Fri, 28 Feb 2014 17:16:12 +0200 Message-ID: <1393600572.3479.64.camel@intelbox> References: <1393001548-2883-1-git-send-email-przanoni@gmail.com> <1393001548-2883-12-git-send-email-przanoni@gmail.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0565838710==" Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id CAA07FB735 for ; Fri, 28 Feb 2014 07:16:33 -0800 (PST) In-Reply-To: <1393001548-2883-12-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org --===============0565838710== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-8dhLDGcQ2sPXMmVcVd4F" --=-8dhLDGcQ2sPXMmVcVd4F Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2014-02-21 at 13:52 -0300, Paulo Zanoni wrote: > From: Paulo Zanoni >=20 > I could swear this was already happening in the current code... >=20 > Also, put the reads and writes in a generic place, so we don't forget > it again when we add runtime PM support to new platforms. >=20 > Signed-off-by: Paulo Zanoni In subject: s/writing/reading/ . Otherwise: Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_uncore.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/i= ntel_uncore.c > index c3a4d6f..acce5e8 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -470,6 +470,7 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_= priv, u32 reg) > #define REG_READ_HEADER(x) \ > unsigned long irqflags; \ > u##x val =3D 0; \ > + assert_device_not_suspended(dev_priv); \ > spin_lock_irqsave(&dev_priv->uncore.lock, irqflags) > =20 > #define REG_READ_FOOTER \ > @@ -568,6 +569,7 @@ __gen4_read(64) > #define REG_WRITE_HEADER \ > unsigned long irqflags; \ > trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \ > + assert_device_not_suspended(dev_priv); \ > spin_lock_irqsave(&dev_priv->uncore.lock, irqflags) > =20 > #define REG_WRITE_FOOTER \ > @@ -598,7 +600,6 @@ gen6_write##x(struct drm_i915_private *dev_priv, off_= t reg, u##x val, bool trace > if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ > __fifo_ret =3D __gen6_gt_wait_for_fifo(dev_priv); \ > } \ > - assert_device_not_suspended(dev_priv); \ > __raw_i915_write##x(dev_priv, reg, val); \ > if (unlikely(__fifo_ret)) { \ > gen6_gt_check_fifodbg(dev_priv); \ > @@ -614,7 +615,6 @@ hsw_write##x(struct drm_i915_private *dev_priv, off_t= reg, u##x val, bool trace) > if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ > __fifo_ret =3D __gen6_gt_wait_for_fifo(dev_priv); \ > } \ > - assert_device_not_suspended(dev_priv); \ > hsw_unclaimed_reg_clear(dev_priv, reg); \ > __raw_i915_write##x(dev_priv, reg, val); \ > if (unlikely(__fifo_ret)) { \ --=-8dhLDGcQ2sPXMmVcVd4F Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTEKg8AAoJEORIIAnNuWDFgH8H/1M62pjtTQRSezuVckaT8yF9 x/UC/OQoZUN57RvEcWEC0Vdb5QL0V3HZlbl7e5yklVyEI5cbyK+q6wr/DfDedZpN +opA6diufpUOBZEB5olsWrd+4MaQqZp+NJJjxQv6BLioLum07IBFHkRsZkbXCrSb PcvrbKrZw+N+w2SaKpR+HsHPh0/qTmJujKuuz3k44HzuKk/j7btkMloI/ir/nPD/ YX53K3k+RKl26K7jvQZKS2O09GAFyMqYMD0IXQqZ0R/i8BCO7JjyKtEA+tlwjfdU x7efmGmisVAsQTToQ/p4TcPGpk35RvL0uPv7zC2RV26R7VUfBgTxizp2WtB1HjU= =JkI6 -----END PGP SIGNATURE----- --=-8dhLDGcQ2sPXMmVcVd4F-- --===============0565838710== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0565838710==--