From mboxrd@z Thu Jan 1 00:00:00 1970 From: naresh.kumar.kachhi@intel.com Subject: [PATCH v2 3/3] drm/i915: warn if ring is active before sync flush Date: Wed, 12 Mar 2014 16:39:42 +0530 Message-ID: <1394622582-21762-4-git-send-email-naresh.kumar.kachhi@intel.com> References: <20140312081205.GC23307@nuc-i3427.alporthouse.com> <1394622582-21762-1-git-send-email-naresh.kumar.kachhi@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 586E1FABF5 for ; Wed, 12 Mar 2014 04:11:25 -0700 (PDT) In-Reply-To: <1394622582-21762-1-git-send-email-naresh.kumar.kachhi@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org From: Naresh Kumar Kachhi Based on Bspec the command parser must be stopped prior to issuing sync flush. This should be done by the caller of intel_ring_setup_status_page. Patch adds a warning if it is not done. v2: rebased based on new patch (wait for ring to become idle) Signed-off-by: Naresh Kumar Kachhi --- drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 4da2211..6ac6569 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -987,6 +987,8 @@ void intel_ring_setup_status_page(struct intel_ring_buffer *ring) /* Flush the TLB for this page */ if (INTEL_INFO(dev)->gen >= 6) { u32 reg = RING_INSTPM(ring->mmio_base); + /* ring should be idle before issuing a sync flush*/ + WARN_ON((I915_READ_MODE(ring) & MODE_IDLE) == 0); I915_WRITE(reg, _MASKED_BIT_ENABLE(INSTPM_TLB_INVALIDATE | -- 1.8.5.3