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From: Imre Deak <imre.deak@intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 04/16] drm/i915: remove dev_priv->pc8.requirements_met
Date: Wed, 19 Mar 2014 17:14:52 +0200	[thread overview]
Message-ID: <1395242092.1887.8.camel@intelbox> (raw)
In-Reply-To: <1394233699-3741-5-git-send-email-przanoni@gmail.com>


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On Fri, 2014-03-07 at 20:08 -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> The requirements_met variable was used to track two things: enabled
> CRTCs and the power well. After the latest chagnes, we get a runtime
> PM reference whenever we get any of the power domains, and we get
> power domains when we enable CRTCs or the power well, so we should
> already be covered, not needing this specific tracking.
> 
> v2: - Rebase.
> v3: - Rebase.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c  |  2 --
>  drivers/gpu/drm/i915/i915_drv.h      |  1 -
>  drivers/gpu/drm/i915/intel_display.c | 54 ------------------------------------
>  drivers/gpu/drm/i915/intel_pm.c      |  5 ++--
>  4 files changed, 3 insertions(+), 59 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 6ee529e..6f96b8f 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2013,8 +2013,6 @@ static int i915_pc8_status(struct seq_file *m, void *unused)
>  	}
>  
>  	mutex_lock(&dev_priv->pc8.lock);
> -	seq_printf(m, "Requirements met: %s\n",
> -		   yesno(dev_priv->pc8.requirements_met));
>  	seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy));
>  	seq_printf(m, "Disable count: %d\n", dev_priv->pc8.disable_count);
>  	seq_printf(m, "IRQs disabled: %s\n",
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a5f1780..75faa51 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1386,7 +1386,6 @@ struct ilk_wm_values {
>   * For more, read "Display Sequences for Package C8" on our documentation.
>   */
>  struct i915_package_c8 {
> -	bool requirements_met;
>  	bool irqs_disabled;
>  	/* Only true after the delayed work task actually enables it. */
>  	bool enabled;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index ab02848..ea9165b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6885,63 +6885,9 @@ void hsw_disable_package_c8(struct drm_i915_private *dev_priv)
>  	mutex_unlock(&dev_priv->pc8.lock);
>  }
>  
> -static bool hsw_can_enable_package_c8(struct drm_i915_private *dev_priv)
> -{
> -	struct drm_device *dev = dev_priv->dev;
> -	struct intel_crtc *crtc;
> -	uint32_t val;
> -
> -	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head)
> -		if (crtc->base.enabled)
> -			return false;
> -
> -	/* This case is still possible since we have the i915.disable_power_well
> -	 * parameter and also the KVMr or something else might be requesting the
> -	 * power well. */
> -	val = I915_READ(HSW_PWR_WELL_DRIVER);
> -	if (val != 0) {
> -		DRM_DEBUG_KMS("Not enabling PC8: power well on\n");
> -		return false;
> -	}
> -
> -	return true;
> -}
> -
> -/* Since we're called from modeset_global_resources there's no way to
> - * symmetrically increase and decrease the refcount, so we use
> - * dev_priv->pc8.requirements_met to track whether we already have the refcount
> - * or not.
> - */
> -static void hsw_update_package_c8(struct drm_device *dev)
> -{
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	bool allow;
> -
> -	if (!HAS_PC8(dev_priv->dev))
> -		return;
> -
> -	mutex_lock(&dev_priv->pc8.lock);
> -
> -	allow = hsw_can_enable_package_c8(dev_priv);
> -
> -	if (allow == dev_priv->pc8.requirements_met)
> -		goto done;
> -
> -	dev_priv->pc8.requirements_met = allow;
> -
> -	if (allow)
> -		__hsw_enable_package_c8(dev_priv);
> -	else
> -		__hsw_disable_package_c8(dev_priv);
> -
> -done:
> -	mutex_unlock(&dev_priv->pc8.lock);
> -}
> -
>  static void haswell_modeset_global_resources(struct drm_device *dev)
>  {
>  	modeset_update_crtc_power_domains(dev);
> -	hsw_update_package_c8(dev);
>  }
>  
>  static int haswell_crtc_mode_set(struct drm_crtc *crtc,
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 53ac8d0..0c69ee2 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5938,6 +5938,8 @@ void intel_init_runtime_pm(struct drm_i915_private *dev_priv)
>  	pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */
>  	pm_runtime_mark_last_busy(device);
>  	pm_runtime_use_autosuspend(device);
> +
> +	pm_runtime_put_autosuspend(device);
>  }
>  
>  void intel_fini_runtime_pm(struct drm_i915_private *dev_priv)
> @@ -6161,10 +6163,9 @@ void intel_pm_setup(struct drm_device *dev)
>  	mutex_init(&dev_priv->rps.hw_lock);
>  
>  	mutex_init(&dev_priv->pc8.lock);
> -	dev_priv->pc8.requirements_met = false;
>  	dev_priv->pc8.irqs_disabled = false;
>  	dev_priv->pc8.enabled = false;
> -	dev_priv->pc8.disable_count = 1; /* requirements_met */
> +	dev_priv->pc8.disable_count = 0;
>  	INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work,
>  			  intel_gen6_powersave_work);
>  }


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  reply	other threads:[~2014-03-19 15:16 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-07 23:08 [PATCH 00/16] Merge PC8 with runtime PM, v3 Paulo Zanoni
2014-03-07 23:08 ` [PATCH 01/16] drm/i915: extract __hsw_do_{en, dis}able_package_c8 Paulo Zanoni
2014-03-07 23:08 ` [PATCH 02/16] drm/i915: make PC8 be part of runtime PM suspend/resume Paulo Zanoni
2014-03-19 15:07   ` Imre Deak
2014-03-19 15:45     ` Daniel Vetter
2014-03-07 23:08 ` [PATCH 03/16] drm/i915: get/put runtime PM when we get/put a power domain Paulo Zanoni
2014-03-07 23:08 ` [PATCH 04/16] drm/i915: remove dev_priv->pc8.requirements_met Paulo Zanoni
2014-03-19 15:14   ` Imre Deak [this message]
2014-03-07 23:08 ` [PATCH 05/16] drm/i915: get runtime PM references when the GPU is idle/busy Paulo Zanoni
2014-03-07 23:08 ` [PATCH 06/16] drm/i915: kill pc8.disable_count Paulo Zanoni
2014-03-07 23:08 ` [PATCH 07/16] drm/i915: remove an indirection level on PC8 functions Paulo Zanoni
2014-03-11  8:20   ` Chris Wilson
2014-03-11 14:56     ` Daniel Vetter
2014-03-07 23:08 ` [PATCH 08/16] drm/i915: don't get/put PC8 reference on freeze/thaw Paulo Zanoni
2014-03-07 23:08 ` [PATCH 09/16] drm/i915: make intel_aux_display_runtime_get get runtime PM, not PC8 Paulo Zanoni
2014-03-19 15:23   ` Imre Deak
2014-03-07 23:08 ` [PATCH 10/16] drm/i915: don't get/put PC8 when getting/putting power wells Paulo Zanoni
2014-03-07 23:08 ` [PATCH 11/16] drm/i915: remove dev_priv->pc8.enabled Paulo Zanoni
2014-03-07 23:08 ` [PATCH 12/16] drm/i915: move pc8.irqs_disabled to pm.irqs_disabled Paulo Zanoni
2014-03-07 23:08 ` [PATCH 13/16] drm/i915: kill struct i915_package_c8 Paulo Zanoni
2014-03-07 23:08 ` [PATCH 14/16] drm/i915: rename __hsw_do_{en, dis}able_pc8 Paulo Zanoni
2014-03-07 23:08 ` [PATCH 15/16] drm/i915: update the PC8 and runtime PM documentation Paulo Zanoni
2014-03-07 23:08 ` [PATCH 16/16] drm/i915: init pm.suspended earlier Paulo Zanoni

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