From: sourab.gupta@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
Akash Goel <akash.goel@intel.com>,
Chris Wilson <chris.wilson@intel.com>
Subject: [PATCH 1/2] drm/i915/vlv: Remove the enabling of VS_TIMER_DISPATCH bit in MI MODE reg
Date: Fri, 21 Mar 2014 18:05:03 +0530 [thread overview]
Message-ID: <1395405304-7012-1-git-send-email-sourab.gupta@intel.com> (raw)
In-Reply-To: <20140207123128.GJ5360@nuc-i3427.alporthouse.com>
From: Akash Goel <akash.goel@intel.com>
Removing the VS_TIMER_DISPATCH bit enable for MI MODE reg for
VLV platform as it is not required.
Signed-off-by: Akash Goel <akash.goel@intel.com>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 1c734ab..7da5774 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -567,7 +567,10 @@ static int init_render_ring(struct intel_ring_buffer *ring)
int ret = init_ring_common(ring);
if (INTEL_INFO(dev)->gen > 3)
- I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH));
+ /* FIXME, should also apply to ivb */
+ if (!IS_VALLEYVIEW(dev))
+ I915_WRITE(MI_MODE,
+ _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH));
/* We need to disable the AsyncFlip performance optimisations in order
* to use MI_WAIT_FOR_EVENT within the CS. It should already be
--
1.8.5.1
next prev parent reply other threads:[~2014-03-21 12:34 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-07 12:22 [PATCH v2 0/3] Rendering specific Hw workarounds for VLV akash.goel
2014-02-07 12:22 ` [PATCH v2 1/3] drm/i915/vlv: Added a rendering specific Hw WA 'WaTlbInvalidateStoreDataBefore' akash.goel
2014-03-21 11:50 ` Gupta, Sourab
2014-03-21 11:59 ` Damien Lespiau
2014-02-07 12:22 ` [PATCH v2 2/3] drm/i915/vlv: Added a rendering specific Hw WA 'WaReadAfterWriteHazard' akash.goel
2014-02-07 12:22 ` [PATCH v2 3/3] drm/i915/vlv: Modified the programming of 2 regs in Ring initialisation akash.goel
2014-02-07 12:31 ` Chris Wilson
2014-02-07 14:34 ` Goel, Akash
2014-03-21 12:35 ` sourab.gupta [this message]
2014-03-21 12:35 ` [PATCH 2/2] drm/i915/vlv: Enabling the TLB invalidate bit in GFX Mode register sourab.gupta
2014-03-21 12:58 ` Chris Wilson
2014-03-21 13:09 ` Gupta, Sourab
2014-03-21 13:17 ` Chris Wilson
2014-03-21 13:31 ` Gupta, Sourab
2014-03-21 13:45 ` Chris Wilson
2014-03-21 15:28 ` [PATCH v2] " sourab.gupta
2014-03-21 16:52 ` Chris Wilson
2014-03-22 4:25 ` Gupta, Sourab
2014-03-22 9:20 ` Chris Wilson
2014-02-07 14:44 ` [PATCH v2 3/3] drm/i915/vlv: Modified the programming of 2 regs in Ring initialisation Ville Syrjälä
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