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From: Imre Deak <imre.deak@intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 6/6] drm/i915: add BDW runtime PM support
Date: Tue, 01 Apr 2014 18:51:39 +0300	[thread overview]
Message-ID: <1396367499.18070.47.camel@intelbox> (raw)
In-Reply-To: <1394233957-3904-7-git-send-email-przanoni@gmail.com>


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On Fri, 2014-03-07 at 20:12 -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> This sould be enough.
> 
> v2: BDW should also run hsw_runtime_resume (Ben).
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Looks good,
Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.c | 8 ++++++--
>  drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>  2 files changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 55f0181..2dcbbc0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -874,8 +874,10 @@ static int intel_runtime_suspend(struct device *device)
>  
>  	if (IS_GEN6(dev))
>  		snb_runtime_suspend(dev_priv);
> -	else if (IS_HASWELL(dev))
> +	else if (IS_HASWELL(dev) || IS_BROADWELL(dev))
>  		hsw_runtime_suspend(dev_priv);
> +	else
> +		WARN_ON(1);
>  
>  	i915_gem_release_all_mmaps(dev_priv);
>  
> @@ -910,8 +912,10 @@ static int intel_runtime_resume(struct device *device)
>  
>  	if (IS_GEN6(dev))
>  		snb_runtime_resume(dev_priv);
> -	else if (IS_HASWELL(dev))
> +	else if (IS_HASWELL(dev) || IS_BROADWELL(dev))
>  		hsw_runtime_resume(dev_priv);
> +	else
> +		WARN_ON(1);
>  
>  	DRM_DEBUG_KMS("Device resumed\n");
>  	return 0;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 1debc412..2f7246a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1997,7 +1997,8 @@ struct drm_i915_cmd_table {
>  #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
>  #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
>  #define HAS_PSR(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev))
> -#define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev))
> +#define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
> +				 IS_BROADWELL(dev))
>  
>  #define INTEL_PCH_DEVICE_ID_MASK		0xff00
>  #define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00


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  reply	other threads:[~2014-04-01 16:00 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-07 23:12 [PATCH 0/6] SNB/BDW runtime PM Paulo Zanoni
2014-03-07 23:12 ` [PATCH 1/6] drm/i915: kill dev_priv->pm.regsave Paulo Zanoni
2014-03-20 12:58   ` Imre Deak
2014-04-01 20:54     ` Paulo Zanoni
2014-03-07 23:12 ` [PATCH 2/6] drm/i915: add gen-specific runtime suspend/resume functions Paulo Zanoni
2014-03-20 12:59   ` Imre Deak
2014-03-07 23:12 ` [PATCH 3/6] drm/i915: add SNB runtime PM support Paulo Zanoni
2014-04-01 15:34   ` Imre Deak
2014-04-01 21:17     ` Paulo Zanoni
2014-03-07 23:12 ` [PATCH 4/6] drm/i915: remove HAS_PC8 check Paulo Zanoni
2014-03-20 13:29   ` Imre Deak
2014-03-07 23:12 ` [PATCH 5/6] drm/i915: BDW needs D_COMP writes through MCHBAR Paulo Zanoni
2014-04-01 15:49   ` Imre Deak
2014-03-07 23:12 ` [PATCH 6/6] drm/i915: add BDW runtime PM support Paulo Zanoni
2014-04-01 15:51   ` Imre Deak [this message]
2014-04-01 21:35     ` Daniel Vetter
2014-04-01 16:21 ` [PATCH 0/6] SNB/BDW runtime PM Imre Deak

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