From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: [PATCH 5/6] drm/i915/vlv: move DP enable after plane/pipe enable per latest spec Date: Fri, 4 Apr 2014 16:12:11 -0700 Message-ID: <1396653132-908-5-git-send-email-jbarnes@virtuousgeek.org> References: <1396653132-908-1-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from gproxy5-pub.mail.unifiedlayer.com (gproxy5-pub.mail.unifiedlayer.com [67.222.38.55]) by gabe.freedesktop.org (Postfix) with SMTP id A9DA16E093 for ; Fri, 4 Apr 2014 16:12:30 -0700 (PDT) Received: from [67.161.37.189] (port=56306 helo=localhost.localdomain) by box514.bluehost.com with esmtpsa (TLSv1.2:CAMELLIA256-SHA:256) (Exim 4.82) (envelope-from ) id 1WWDHe-00016L-3X for intel-gfx@lists.freedesktop.org; Fri, 04 Apr 2014 17:12:26 -0600 In-Reply-To: <1396653132-908-1-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org The spec changed the order awhile back to put the ports at the end again, but we never updated. Things seem to work ok either way, but apparently there are some failures fixed by the new order, so let's just go ahead and do it. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index df7cc11..98cf24f 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1842,7 +1842,23 @@ static void g4x_enable_dp(struct intel_encoder *encoder) static void vlv_enable_dp(struct intel_encoder *encoder) { struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); + struct intel_digital_port *dport = dp_to_dig_port(intel_dp); + struct drm_device *dev = encoder->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + uint32_t dp_reg = I915_READ(intel_dp->output_reg); + + if (WARN_ON(dp_reg & DP_PORT_EN)) + return; + intel_edp_panel_vdd_on(intel_dp); + intel_dp_start_link_train(intel_dp); + if (!is_edp(intel_dp)) + intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); + intel_edp_panel_on(intel_dp); + vlv_wait_port_ready(dev_priv, dport); + edp_panel_vdd_off(intel_dp, true); + intel_dp_complete_link_train(intel_dp); + intel_dp_stop_link_train(intel_dp); intel_edp_backlight_on(intel_dp); } @@ -1888,10 +1904,6 @@ static void vlv_pre_enable_dp(struct intel_encoder *encoder) intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, &power_seq); } - - intel_enable_dp(encoder); - - vlv_wait_port_ready(dev_priv, dport); } static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder) -- 1.8.4.2