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From: Shobhit Kumar <shobhit.kumar@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>
Cc: Jani Nikula <jani.nikula@intel.com>,
	Daniel Vetter <daniel.vetter@intel.com>
Subject: [PATCH 2/7] drm/i915: Enable MIPI port before the plane and pipe enable
Date: Wed,  9 Apr 2014 13:59:31 +0530	[thread overview]
Message-ID: <1397032176-11988-3-git-send-email-shobhit.kumar@intel.com> (raw)
In-Reply-To: <1397032176-11988-1-git-send-email-shobhit.kumar@intel.com>

As per the hw team's recommendation we need to enable the MIPI port
before enabling the plane and pipe. So call MIPI port enable in
pre_enable phase itself

Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c | 51 ++++++++++++++++++++++++++--------------
 1 file changed, 33 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 7ceb8c6..569e6c6 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -131,21 +131,6 @@ static void intel_dsi_device_ready(struct intel_encoder *encoder)
 	I915_WRITE(MIPI_DEVICE_READY(pipe), DEVICE_READY);
 	usleep_range(2000, 2500);
 }
-static void intel_dsi_pre_enable(struct intel_encoder *encoder)
-{
-	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
-
-	DRM_DEBUG_KMS("\n");
-
-	if (intel_dsi->dev.dev_ops->panel_reset)
-		intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev);
-
-	/* put device in ready state */
-	intel_dsi_device_ready(encoder);
-
-	if (intel_dsi->dev.dev_ops->send_otp_cmds)
-		intel_dsi->dev.dev_ops->send_otp_cmds(&intel_dsi->dev);
-}
 
 static void intel_dsi_enable(struct intel_encoder *encoder)
 {
@@ -165,15 +150,45 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
 		dpi_send_cmd(intel_dsi, TURN_ON);
 		msleep(100);
 
+		if (intel_dsi->dev.dev_ops->enable)
+			intel_dsi->dev.dev_ops->enable(&intel_dsi->dev);
+
 		/* assert ip_tg_enable signal */
 		temp = I915_READ(MIPI_PORT_CTRL(pipe)) & ~LANE_CONFIGURATION_MASK;
 		temp = temp | intel_dsi->port_bits;
 		I915_WRITE(MIPI_PORT_CTRL(pipe), temp | DPI_ENABLE);
 		POSTING_READ(MIPI_PORT_CTRL(pipe));
 	}
+}
+
+static void intel_dsi_pre_enable(struct intel_encoder *encoder)
+{
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+
+	DRM_DEBUG_KMS("\n");
+
+	if (intel_dsi->dev.dev_ops->panel_reset)
+		intel_dsi->dev.dev_ops->panel_reset(&intel_dsi->dev);
+
+	/* put device in ready state */
+	intel_dsi_device_ready(encoder);
 
-	if (intel_dsi->dev.dev_ops->enable)
-		intel_dsi->dev.dev_ops->enable(&intel_dsi->dev);
+	if (intel_dsi->dev.dev_ops->send_otp_cmds)
+		intel_dsi->dev.dev_ops->send_otp_cmds(&intel_dsi->dev);
+
+	/* Enable port in pre-enable phase itself because as per hw team
+	 * recommendation, port should be enabled befor plane & pipe */
+	intel_dsi_enable(encoder);
+}
+
+static void intel_dsi_enable_nop(struct intel_encoder *encoder)
+{
+	DRM_DEBUG_KMS("\n");
+
+	/* for DSI port enable has to be done before pipe
+	 * and plane enable, so port enable is done in
+	 * pre_enable phase itself unlike other encoders
+	 */
 }
 
 static void intel_dsi_disable(struct intel_encoder *encoder)
@@ -600,7 +615,7 @@ bool intel_dsi_init(struct drm_device *dev)
 	intel_encoder->compute_config = intel_dsi_compute_config;
 	intel_encoder->pre_pll_enable = intel_dsi_pre_pll_enable;
 	intel_encoder->pre_enable = intel_dsi_pre_enable;
-	intel_encoder->enable = intel_dsi_enable;
+	intel_encoder->enable = intel_dsi_enable_nop;
 	intel_encoder->mode_set = intel_dsi_mode_set;
 	intel_encoder->disable = intel_dsi_disable;
 	intel_encoder->post_disable = intel_dsi_post_disable;
-- 
1.8.3.2

  parent reply	other threads:[~2014-04-09  8:31 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-09  8:29 [PATCH 0/7] Updated MIPI sequence for BYT Shobhit Kumar
2014-04-09  8:29 ` [PATCH 1/7] drm/i915: Program Rcomp and band gap reset everytime we resume from power gate Shobhit Kumar
2014-04-09  8:29 ` Shobhit Kumar [this message]
2014-04-09  8:29 ` [PATCH 3/7] drm/i915: Disable DPOunit clock gating Shobhit Kumar
2014-04-09  8:29 ` [PATCH 4/7] drm/i915: Parameterize the Clockstop and escape_clk_div Shobhit Kumar
2014-04-09  8:29 ` [PATCH 5/7] drm/i915: Panel commands can be sent only when clock is in LP11 Shobhit Kumar
2014-04-09  8:29 ` [PATCH 6/7] drm/i915: Send DPI command explicitely in LP mode Shobhit Kumar
2014-04-09  8:29 ` [PATCH 7/7] drm/i915: Enable RANDOM resolution support for MIPI panels Shobhit Kumar
2014-04-09 14:51 ` [PATCH 0/7] Updated MIPI sequence for BYT Daniel Vetter
2014-04-09 16:01   ` Kumar, Shobhit
2014-04-09 16:50     ` Daniel Vetter

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