[PATCH 32/71] drm/i915/bdw: Add BDW PM Interrupts support and BDW rps disable

ville.syrjala
2014-04-09T10:31:01Z

From: Deepak S <deepak.s@intel.com>

Signed-off-by: Deepak S <deepak.s@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2aa65ce..fb533a3 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3206,6 +3206,18 @@ static void gen6_disable_rps(struct drm_device *dev)
gen6_disable_rps_interrupts(dev);
}

+static void gen8_disable_rps(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ I915_WRITE(GEN6_RC_CONTROL, 0);
+ I915_WRITE(GEN6_RPNSWREQ, 1 << 31);
+
+ gen8_disable_rps_interrupts(dev);
+}
+
+
+
static void cherryview_disable_rps(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -3369,7 +3381,7 @@ static void gen8_enable_rps(struct drm_device *dev)

gen6_set_rps(dev, (I915_READ(GEN6_GT_PERF_STATUS) & 0xff00) >> 8);

- gen6_enable_rps_interrupts(dev);
+ gen8_enable_rps_interrupts(dev);

gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
}
@@ -4652,6 +4664,8 @@ void intel_disable_gt_powersave(struct drm_device *dev)
mutex_lock(&dev_priv->rps.hw_lock);
if (IS_CHERRYVIEW(dev))
cherryview_disable_rps(dev);
+ else if (IS_BROADWELL(dev))
+ gen8_disable_rps(dev);
else if (IS_VALLEYVIEW(dev))
valleyview_disable_rps(dev);
else
--
1.8.3.2