From: deepak.s@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 00/10] Enable RC6/Turbo on CHV
Date: Mon, 21 Apr 2014 13:23:00 +0530 [thread overview]
Message-ID: <1398066790-7489-1-git-send-email-deepak.s@linux.intel.com> (raw)
From: Deepak S <deepak.s@linux.intel.com>
Squashed some of the patches and created a new patch series.
ToDo: Address the comments on some the patches. Changes will be shared in next series.
Ben Widawsky (1):
drm/i915/bdw: Implement a basic PM interrupt handler
Deepak S (6):
drm/i915: Enable PM Interrupts target via Display Interface.
drm/i915/chv: Enable Render Standby (RC6) for Cheeryview
drm/i915/chv: Added CHV specific register read and write
drm/i915/chv: Enable RPS (Turbo) for Cheeryview
drm/i915/chv: Added CHV specific DDR fetch into init_clock_gating
drm/i915/chv: Freq(opcode) request value for CHV.
Ville Syrjälä (3):
drm/i915/chv: Streamline CHV forcewake stuff
drm/i915/chv: CHV doesn't need WaRsForcewakeWaitTC0
drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV
drivers/gpu/drm/i915/i915_drv.h | 10 ++
drivers/gpu/drm/i915/i915_irq.c | 79 +++++++++++-
drivers/gpu/drm/i915/i915_reg.h | 13 ++
drivers/gpu/drm/i915/intel_drv.h | 2 +
drivers/gpu/drm/i915/intel_pm.c | 231 +++++++++++++++++++++++++++++++++-
drivers/gpu/drm/i915/intel_sideband.c | 15 +++
drivers/gpu/drm/i915/intel_uncore.c | 126 +++++++++++++++++--
7 files changed, 455 insertions(+), 21 deletions(-)
--
1.9.1
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next reply other threads:[~2014-04-21 7:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-21 7:53 deepak.s [this message]
2014-04-21 13:58 ` [PATCH 00/10] Enable RC6/Turbo on CHV Deepak S
2014-04-22 20:19 ` Daniel Vetter
2014-04-23 5:09 ` Deepak S
-- strict thread matches above, loose matches on Subject: below --
2014-05-05 12:47 deepak.s
2014-05-15 21:22 ` Daniel Vetter
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