From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH I-g-t V2 2/2] tests/gem_dummy_reloc_loop: Add one subtest based on multi drm_fd to test CPU<->GPU sync under multi BSD rings Date: Tue, 22 Apr 2014 15:05:03 +0300 Message-ID: <1398168303.21147.59.camel@intelbox> References: <1397529528-7114-1-git-send-email-yakui.zhao@intel.com> <1397529528-7114-3-git-send-email-yakui.zhao@intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0310185829==" Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id F019B6E52D for ; Tue, 22 Apr 2014 05:05:54 -0700 (PDT) In-Reply-To: <1397529528-7114-3-git-send-email-yakui.zhao@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Zhao Yakui Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0310185829== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-n9sjkB5Y1lZr/navvBeY" --=-n9sjkB5Y1lZr/navvBeY Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 2014-04-15 at 10:38 +0800, Zhao Yakui wrote: > The Broadwell GT3 machine has two independent BSD rings in kernel driver = while > it is transparent to the user-space driver. In such case it needs to chec= k > the CPU<->GPU sync for the second BSD ring. >=20 > V1->V2: Follow Daniel's comment to add one subtext instead of one individ= ual > test case, which is used to test the CPU<->GPU sync under multi BSD rings >=20 > Signed-off-by: Zhao Yakui > --- > tests/gem_dummy_reloc_loop.c | 102 ++++++++++++++++++++++++++++++++++++= +++++- > 1 file changed, 101 insertions(+), 1 deletion(-) >=20 > diff --git a/tests/gem_dummy_reloc_loop.c b/tests/gem_dummy_reloc_loop.c > index a61b59b..660d8e1 100644 > --- a/tests/gem_dummy_reloc_loop.c > +++ b/tests/gem_dummy_reloc_loop.c > @@ -48,6 +48,13 @@ static drm_intel_bufmgr *bufmgr; > struct intel_batchbuffer *batch; > static drm_intel_bo *target_buffer; > =20 > +#define NUM_FD 50 > + > +static int mfd[NUM_FD]; > +static drm_intel_bufmgr *mbufmgr[NUM_FD]; > +static struct intel_batchbuffer *mbatch[NUM_FD]; > +static drm_intel_bo *mbuffer[NUM_FD]; > + > /* > * Testcase: Basic check of ring<->cpu sync using a dummy reloc > * > @@ -124,6 +131,50 @@ dummy_reloc_loop_random_ring(int num_rings) > } > } > =20 > +static void > +dummy_reloc_loop_random_ring_multi_fd(int num_rings) > +{ > + int i; > + struct intel_batchbuffer *saved_batch; > + > + saved_batch =3D batch; > + > + srandom(0xdeadbeef); > + > + for (i =3D 0; i < 0x100000; i++) { > + int mindex; > + int ring =3D random() % num_rings + 1; > + > + mindex =3D random() % NUM_FD; > + batch =3D mbatch[mindex]; > + > + if (ring =3D=3D I915_EXEC_RENDER) { > + BEGIN_BATCH(4); > + OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE); > + OUT_BATCH(0xffffffff); /* compare dword */ > + OUT_RELOC(mbuffer[mindex], I915_GEM_DOMAIN_RENDER, > + I915_GEM_DOMAIN_RENDER, 0); > + OUT_BATCH(MI_NOOP); > + ADVANCE_BATCH(); > + } else { > + BEGIN_BATCH(4); > + OUT_BATCH(MI_FLUSH_DW | 1); > + OUT_BATCH(0); /* reserved */ > + OUT_RELOC(mbuffer[mindex], I915_GEM_DOMAIN_RENDER, > + I915_GEM_DOMAIN_RENDER, 0); > + OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); > + ADVANCE_BATCH(); > + } > + intel_batchbuffer_flush_on_ring(batch, ring); > + > + drm_intel_bo_map(target_buffer, 0); > + // map to force waiting on rendering > + drm_intel_bo_unmap(target_buffer); > + } > + > + batch =3D saved_batch; > +} > + > int fd; > int devid; > int num_rings; > @@ -133,6 +184,7 @@ igt_main > igt_skip_on_simulation(); > =20 > igt_fixture { > + int i; > fd =3D drm_open_any(); > devid =3D intel_get_drm_devid(fd); > num_rings =3D gem_get_num_rings(fd); > @@ -148,6 +200,35 @@ igt_main > =20 > target_buffer =3D drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); > igt_assert(target_buffer); > + > + /* Create multi drm_fd and map one gem object to multi gem_contexts */ > + { > + unsigned int target_flink; > + char buffer_name[32]; > + if (dri_bo_flink(target_buffer, &target_flink)) { > + printf("fail to get flink for target buffer\n"); > + igt_assert(0); For the future: could be just igt_assert_f(). > + } > + for (i =3D 0; i < NUM_FD; i++) { > + mfd[i] =3D 0; > + mbufmgr[i] =3D NULL; > + mbuffer[i] =3D NULL; > + } Nitpick: the above are all statics, so no need to init them. Other than the above this looks good: Reviewed-by: Imre Deak > + for (i =3D 0; i < NUM_FD; i++) { > + sprintf(buffer_name, "Target buffer %d\n", i); > + mfd[i] =3D drm_open_any(); > + mbufmgr[i] =3D drm_intel_bufmgr_gem_init(mfd[i], 4096); > + igt_assert(mbufmgr[i]); > + drm_intel_bufmgr_gem_enable_reuse(mbufmgr[i]); > + mbatch[i] =3D intel_batchbuffer_alloc(mbufmgr[i], devid); > + igt_assert(mbufmgr[i]); > + mbuffer[i] =3D intel_bo_gem_create_from_name( > + mbufmgr[i], > + buffer_name, > + target_flink); > + igt_assert(mbuffer[i]); > + } > + } > } > =20 > igt_subtest("render") { > @@ -190,8 +271,27 @@ igt_main > printf("dummy loop run on random rings completed\n"); > } > } > - > + igt_subtest("mixed_multi_fd") { > + if (num_rings > 1) { > + sleep(2); > + printf("running dummy loop on random rings based on " > + "multi drm_fd\n"); > + dummy_reloc_loop_random_ring_multi_fd(num_rings); > + printf("dummy loop run on random rings based on " > + "multi drm_fd completed\n"); > + } > + } > igt_fixture { > + int i; > + /* Free the buffer/batchbuffer/buffer mgr for multi-fd */ > + { > + for (i =3D 0; i < NUM_FD; i++) { > + dri_bo_unreference(mbuffer[i]); > + intel_batchbuffer_free(mbatch[i]); > + drm_intel_bufmgr_destroy(mbufmgr[i]); > + close(mfd[i]); > + } > + } > drm_intel_bo_unreference(target_buffer); > intel_batchbuffer_free(batch); > drm_intel_bufmgr_destroy(bufmgr); --=-n9sjkB5Y1lZr/navvBeY Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTVlrvAAoJEORIIAnNuWDF/tcIANx1RHJSaMe3Vj5edg2PDUYG UyXLK2RMeJPy/T86qowGd0hjFzsRTg/61x5RJ01iw+pV0VLnzXBjD7l8OUuKlLpl QYSFZZASfjTAiROMdisSPcUZIuPpkKzFiFDVk5jJGACKAmYRKZ563swj+wmg82iz 4K30nED7pTb2sJprOn5Qk7vntiBVloOUyoWnap2akrq+Yi+P8egrj4wefTFQFztD 3kjVnIcxpURgmO5AkMPT0ujsU2YiOrJk1gxmcB9WEqtmttTb0xFt+/4Z0ypNd852 HXMqHgT+7chllRciXh2lfB3IhmqRZoGXIeq3LbPu6yV5mmdTNAB/zTDEnWgBTUE= =UxIj -----END PGP SIGNATURE----- --=-n9sjkB5Y1lZr/navvBeY-- --===============0310185829== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0310185829==--