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From: Imre Deak <imre.deak@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 08/25] drm/i915: get a runtime PM ref for the deferred GT powersave enabling
Date: Fri, 25 Apr 2014 11:14:26 +0300	[thread overview]
Message-ID: <1398413666.29729.6.camel@intelbox> (raw)
In-Reply-To: <20140425075917.GH26374@phenom.ffwll.local>


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On Fri, 2014-04-25 at 09:59 +0200, Daniel Vetter wrote:
> On Mon, Apr 14, 2014 at 08:24:29PM +0300, Imre Deak wrote:
> > At least on VLV but probably on other platforms too we depend on RC6
> > being enabled for RPM, so disable RPM until the delayed RC6 enabling
> > completes.
> > 
> > v2:
> > - explain the reason for the _noresume version of RPM get (Daniel)
> > - use the simpler 'if (schedule_work()) rpm_get();' instead of
> >   'if (!cancel_work_sync()) rpm_get(); schedule_work();'
> > 
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.c  |  5 ++++-
> >  drivers/gpu/drm/i915/intel_drv.h |  2 ++
> >  drivers/gpu/drm/i915/intel_pm.c  | 34 ++++++++++++++++++++++++++++++++--
> >  3 files changed, 38 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index a821608..a20d2d1 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -754,7 +754,7 @@ int i915_reset(struct drm_device *dev)
> >  		 * previous concerns that it doesn't respond well to some forms
> >  		 * of re-init after reset. */
> >  		if (INTEL_INFO(dev)->gen > 5)
> > -			intel_enable_gt_powersave(dev);
> > +			intel_reset_gt_powersave(dev);
> >  
> >  		intel_hpd_init(dev);
> >  	} else {
> > @@ -923,6 +923,9 @@ static int intel_runtime_suspend(struct device *device)
> >  	struct drm_device *dev = pci_get_drvdata(pdev);
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >  
> > +	if (WARN_ON_ONCE(!dev_priv->rps.enabled))
> > +		return -ENODEV;
> > +
> >  	WARN_ON(!HAS_RUNTIME_PM(dev));
> >  	assert_force_wake_inactive(dev_priv);
> >  
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index c551472..618d05a 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -924,6 +924,7 @@ void intel_init_gt_powersave(struct drm_device *dev);
> >  void intel_cleanup_gt_powersave(struct drm_device *dev);
> >  void intel_enable_gt_powersave(struct drm_device *dev);
> >  void intel_disable_gt_powersave(struct drm_device *dev);
> > +void intel_reset_gt_powersave(struct drm_device *dev);
> >  void ironlake_teardown_rc6(struct drm_device *dev);
> >  void gen6_update_ring_freq(struct drm_device *dev);
> >  void gen6_rps_idle(struct drm_i915_private *dev_priv);
> > @@ -931,6 +932,7 @@ void gen6_rps_boost(struct drm_i915_private *dev_priv);
> >  void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
> >  void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
> >  void intel_runtime_pm_get(struct drm_i915_private *dev_priv);
> > +void intel_runtime_pm_get_noresume(struct drm_i915_private *dev_priv);
> >  void intel_runtime_pm_put(struct drm_i915_private *dev_priv);
> >  void intel_init_runtime_pm(struct drm_i915_private *dev_priv);
> >  void intel_fini_runtime_pm(struct drm_i915_private *dev_priv);
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index e5b9f08..0e8b263 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4549,6 +4549,8 @@ static void intel_gen6_powersave_work(struct work_struct *work)
> >  	}
> >  	dev_priv->rps.enabled = true;
> >  	mutex_unlock(&dev_priv->rps.hw_lock);
> > +
> > +	intel_runtime_pm_put(dev_priv);
> >  }
> >  
> >  void intel_enable_gt_powersave(struct drm_device *dev)
> > @@ -4566,12 +4568,28 @@ void intel_enable_gt_powersave(struct drm_device *dev)
> >  		 * PCU communication is slow and this doesn't need to be
> >  		 * done at any specific time, so do this out of our fast path
> >  		 * to make resume and init faster.
> > +		 *
> > +		 * We depend on the HW RC6 power context save/restore
> > +		 * mechanism when entering D3 through runtime PM suspend. So
> > +		 * disable RPM until RPS/RC6 is properly setup. We can only
> > +		 * get here via the driver load/system resume/runtime resume
> > +		 * paths, so the _noresume version is enough (and in case of
> > +		 * runtime resume it's necessary).
> >  		 */
> > -		schedule_delayed_work(&dev_priv->rps.delayed_resume_work,
> > -				      round_jiffies_up_relative(HZ));
> > +		if (schedule_delayed_work(&dev_priv->rps.delayed_resume_work,
> > +					   round_jiffies_up_relative(HZ)))
> > +			intel_runtime_pm_get_noresume(dev_priv);
> >  	}
> >  }
> >  
> > +void intel_reset_gt_powersave(struct drm_device *dev)
> > +{
> > +	struct drm_i915_private *dev_priv = dev->dev_private;
> > +
> > +	dev_priv->rps.enabled = false;
> > +	intel_enable_gt_powersave(dev);
> > +}
> > +
> >  static void ibx_init_clock_gating(struct drm_device *dev)
> >  {
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> > @@ -6025,6 +6043,18 @@ void intel_runtime_pm_get(struct drm_i915_private *dev_priv)
> >  	WARN(dev_priv->pm.suspended, "Device still suspended.\n");
> >  }
> >  
> > +void intel_runtime_pm_get_noresume(struct drm_i915_private *dev_priv)
> > +{
> > +	struct drm_device *dev = dev_priv->dev;
> > +	struct device *device = &dev->pdev->dev;
> > +
> > +	if (!HAS_RUNTIME_PM(dev))
> > +		return;
> > +
> > +	WARN(dev_priv->pm.suspended, "Getting nosync-ref while suspended.\n");
> 
> Do we really need our own tracking in dev_priv->pm.suspended, is there
> nothing in the runtime pm core which we could use instaed?

Hm, yes by a quick look pm_runtime_suspended() seems like what we could
use instead. But this was just copy&paste, and the rest of the spots
would need changing too, so could we do it as a follow-up?

--Imre

> -Daniel
> 
> > +	pm_runtime_get_noresume(device);
> > +}
> > +
> >  void intel_runtime_pm_put(struct drm_i915_private *dev_priv)
> >  {
> >  	struct drm_device *dev = dev_priv->dev;
> > -- 
> > 1.8.4
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 


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  reply	other threads:[~2014-04-25  8:14 UTC|newest]

Thread overview: 85+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-14 17:24 [PATCH v2 00/25] vlv: add support for RPM Imre Deak
2014-04-14 17:24 ` [PATCH v2 01/25] drm/i915: vlv: clean up GTLC wake control/status register macros Imre Deak
2014-04-24 21:04   ` Rodrigo Vivi
2014-04-14 17:24 ` [PATCH v2 02/25] drm/i915: vlv: clear master interrupt flag when disabling interrupts Imre Deak
2014-04-14 17:24 ` [PATCH v2 03/25] drm/i915: vlv: add RC6 residency counters Imre Deak
2014-04-14 17:24 ` [PATCH v2 04/25] drm/i915: fix the RC6 status debug print Imre Deak
2014-04-14 17:24 ` [PATCH v2 05/25] drm/i915: remove the i915_dpio debugfs entry Imre Deak
2014-04-14 17:24 ` [PATCH v2 06/25] drm/i915: get a runtime PM ref for debugfs entries where needed Imre Deak
2014-04-14 17:24 ` [PATCH v2 07/25] drm/i915: move getting struct_mutex lower in the callstack during GPU reset Imre Deak
2014-04-14 17:24 ` [PATCH v2 08/25] drm/i915: get a runtime PM ref for the deferred GT powersave enabling Imre Deak
2014-04-25  7:59   ` Daniel Vetter
2014-04-25  8:14     ` Imre Deak [this message]
2014-04-25  9:09       ` Daniel Vetter
2014-04-25  8:01   ` Daniel Vetter
2014-04-14 17:24 ` [PATCH v2 09/25] drm/i915: get a runtime PM ref for the deferred GPU reset work Imre Deak
2014-04-16 12:11   ` Ville Syrjälä
2014-04-18 12:47   ` [PATCH v3] " Imre Deak
2014-04-22 19:38     ` Daniel Vetter
2014-04-22 20:34       ` Imre Deak
2014-04-22 21:05         ` Daniel Vetter
2014-04-22 22:13     ` [PATCH v4] " Imre Deak
2014-04-23  7:07       ` Daniel Vetter
2014-04-23  7:52         ` Imre Deak
2014-04-25  8:00           ` Daniel Vetter
2014-04-14 17:24 ` [PATCH v2 10/25] drm/i915: gen2: move error capture of IER to its correct place Imre Deak
2014-04-16 12:22   ` Ville Syrjälä
2014-04-16 12:57     ` Imre Deak
2014-04-24 21:06       ` Rodrigo Vivi
2014-04-14 17:24 ` [PATCH v2 11/25] drm/i915: add missing error capturing of the PIPESTAT reg Imre Deak
2014-04-16 12:17   ` Ville Syrjälä
2014-04-18 11:44     ` Imre Deak
2014-04-18 12:55   ` [PATCH v3 " Imre Deak
2014-04-23  7:53     ` Ville Syrjälä
2014-04-14 17:24 ` [PATCH v2 12/25] drm/i915: vlv: check port power domain instead of only D0 for eDP VDD on Imre Deak
2014-04-14 17:24 ` [PATCH v2 13/25] drm/i915: fix unbalanced GT powersave enable / disable calls Imre Deak
2014-04-14 17:24 ` [PATCH v2 14/25] drm/i915: sanitize enable_rc6 option Imre Deak
2014-04-16 12:28   ` Ville Syrjälä
2014-04-16 12:37     ` Imre Deak
2014-04-18 13:01   ` [PATCH v3 " Imre Deak
2014-04-23  7:58     ` Ville Syrjälä
2014-04-14 17:24 ` [PATCH v2 15/25] drm/i915: disable runtime PM if RC6 is disabled Imre Deak
2014-04-14 17:24 ` [PATCH v2 16/25] drm/i915: make runtime PM interrupt enable/disable platform independent Imre Deak
2014-04-14 17:24 ` [PATCH v2 17/25] drm/i915: factor out gen6_update_ring_freq Imre Deak
2014-04-16 17:31   ` Ville Syrjälä
2014-04-18 13:16   ` [PATCH v3 " Imre Deak
2014-04-23  7:59     ` Ville Syrjälä
2014-04-14 17:24 ` [PATCH v2 18/25] drm/i915: make runtime PM swizzling/ring_freq init platform independent Imre Deak
2014-04-14 17:24 ` [PATCH v2 19/25] drm/i915: reinit GT power save during resume Imre Deak
2014-04-16 17:46   ` Ville Syrjälä
2014-04-18 10:51     ` Imre Deak
2014-04-22 17:21   ` [PATCH v3 " Imre Deak
2014-04-23  8:06     ` Ville Syrjälä
2014-04-14 17:24 ` [PATCH v2 20/25] drm/i915: vlv: setup RPS min/max frequencies once during init time Imre Deak
2014-04-14 17:24 ` [PATCH v2 21/25] drm/i915: vlv: factor out vlv_force_gfx_clock Imre Deak
2014-04-16 17:49   ` Ville Syrjälä
2014-04-18 13:35   ` [PATCH v3 21/25] drm/i915: vlv: factor out vlv_force_gfx_clock and check for pending force-off Imre Deak
2014-04-23  8:11     ` Ville Syrjälä
2014-04-14 17:24 ` [PATCH v2 22/25] drm/i915: vlv: increase timeout when forcing on the GFX clock Imre Deak
2014-04-25 14:04   ` Daniel Vetter
2014-04-14 17:24 ` [PATCH v2 23/25] drm/i915: add various missing GTI/Gunit register definitions Imre Deak
2014-04-24 21:17   ` Rodrigo Vivi
2014-04-24 21:49     ` Imre Deak
2014-04-30 14:32   ` Ville Syrjälä
2014-05-05 11:43     ` Imre Deak
2014-05-05 12:13   ` [PATCH v3 " Imre Deak
2014-05-05 12:21     ` Ville Syrjälä
2014-04-14 17:24 ` [PATCH v2 24/25] drm/i915: propagate the error code from runtime PM callbacks Imre Deak
2014-04-15 13:39   ` [PATCH v3 " Imre Deak
2014-04-30 18:05     ` Ville Syrjälä
2014-04-30 18:53       ` Imre Deak
2014-05-05 12:44         ` Ville Syrjälä
2014-05-05 13:18           ` Imre Deak
2014-04-14 17:24 ` [PATCH v2 25/25] drm/i915: vlv: add runtime PM support Imre Deak
2014-04-16 12:39   ` Ville Syrjälä
2014-04-16 14:53   ` Daniel Vetter
2014-04-16 16:01     ` Imre Deak
2014-04-22 17:28   ` [PATCH v3 " Imre Deak
2014-04-22 22:09     ` [PATCH v4] drm/i915: get a runtime PM ref for the deferred GPU reset work Imre Deak
2014-04-24 21:02       ` Rodrigo Vivi
2014-04-30 17:35     ` [PATCH v3 25/25] drm/i915: vlv: add runtime PM support Ville Syrjälä
2014-05-05  9:33       ` Daniel Vetter
2014-05-05 12:19     ` [PATCH v4 " Imre Deak
2014-04-14 17:41 ` [PATCH v2 26/25] drm/i915: vlv: enable runtime PM Imre Deak
2014-05-06 19:39   ` Daniel Vetter
2014-04-17 11:00 ` [PATCH v2 00/25] vlv: add support for RPM Ville Syrjälä

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