From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 18/71] drm/i915/chv: Add vlv_pipe_to_channel Date: Mon, 28 Apr 2014 17:33:11 +0300 Message-ID: <1398695591.17779.13.camel@intelbox> References: <1397039349-10639-1-git-send-email-ville.syrjala@linux.intel.com> <1397039349-10639-19-git-send-email-ville.syrjala@linux.intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1326816990==" Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id DBBC46E85E for ; Mon, 28 Apr 2014 07:33:19 -0700 (PDT) In-Reply-To: <1397039349-10639-19-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1326816990== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-dnvv/q0ZbJAgx7qNuZwO" --=-dnvv/q0ZbJAgx7qNuZwO Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2014-04-09 at 13:28 +0300, ville.syrjala@linux.intel.com wrote: > From: Chon Ming Lee >=20 > Cherryview has 3 pipes. Some of the pll dpio offset calculation is > based on pipe number. Need to use vlv_pipe_to_channel to calculate the > correct phy channel to use for the pipe. >=20 > Signed-off-by: Chon Ming Lee Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_drv.h | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) >=20 > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/inte= l_drv.h > index 087e471..e572799 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -544,6 +544,20 @@ vlv_dport_to_channel(struct intel_digital_port *dpor= t) > } > } > =20 > +static inline int > +vlv_pipe_to_channel(enum pipe pipe) > +{ > + switch (pipe) { > + case PIPE_A: > + case PIPE_C: > + return DPIO_CH0; > + case PIPE_B: > + return DPIO_CH1; > + default: > + BUG(); > + } > +} > + > static inline struct drm_crtc * > intel_get_crtc_for_pipe(struct drm_device *dev, int pipe) > { --=-dnvv/q0ZbJAgx7qNuZwO Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTXmanAAoJEORIIAnNuWDFDecH/jBdQls9lrnLwF8DnO3XPfw+ Z4OG2uOaUTk4VvIPU3ceo0KOCMfZmaBvn864hjlCEaXPY5a8GgCN8OKqkSJDBWOW Da8xrZ6xIrdqOG5efNgXzhOWhcLgst7fhT9yxz58MFgrqnE7nC8d/HsSnnEsWlpl MUyIPbzbBLRSmpdsLuzReQmwh1YLCZFK7l0ojCgX/HvrzUqImLABwzCSfWPbXwGI GaKUvEeohXLDsFCh0t5d4kGJ+9t9e8KJ5DwT1i7olyDzEtmJVmSvMLWiXmSbBkeU Bdu+xc+YZHewPfW7OiIPdcIQtb9tyDcyWFVwj2jJRCLGmMoIc2SIHnLjhpiy1Z8= =M2ku -----END PGP SIGNATURE----- --=-dnvv/q0ZbJAgx7qNuZwO-- --===============1326816990== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1326816990==--