Re: [PATCH 00/66] runtime pm for DPMS

[Imre Deak <imre.deak@intel.com>]

[-- Attachment #1.1: Type: text/plain, Size: 5447 bytes --]

On Fri, 2014-04-25 at 10:45 +0200, Daniel Vetter wrote:
> Ok, review assignements. Please complain if you don't have the
> bandwidth so that I can find someone else.
> 
> On Thu, Apr 24, 2014 at 11:54 PM, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> >
> > Daniel Vetter (66):
> >   drm/i915: Make encoder->mode_set callbacks optional
> >   drm/i915/dvo: Remove ->mode_set callback
> >   drm/i915/tv: extract set_tv_mode_timings
> >   drm/i915/tv: extract set_color_conversion
> >   drm/i915/tv: De-magic device check
> >   drm/i915/tv: Rip out pipe-disabling nonsense from ->mode_set
> >   drm/i915/tv: Remove ->mode_set callback
> >   drm/i915/crt: Remove ->mode_set callback
> >   drm/i915/sdvo: Remove ->mode_set callback
> >
> > Removal of encoder->mode_set callbacks, part 1
> 
> Reviewer: Imre
> 
> >   drm/i915/hdmi: Enable hdmi mode on g4x, too
> >   drm/i915: Track hdmi mode in the pipe config
> >   drm/i915/sdvo: Use pipe_config->limited_color_range consistently
> >   drm/i915: state readout and cross checking for limited_color_range
> >   drm/i915/sdvo: use config->has_hdmi_sink
> >   drm/i915: Simplify audio handling on DDI ports
> >   drm/i915: Track has_audio in the pipe config
> >   drm/i915/dp: Move port A pll setup to g4x_pre_enable_dp
> >   drm/i915/dp: Remove ->mode_set callback
> >   drm/i915/hdmi: Remove redundant IS_VLV checks
> >   drm/i915/hdmi: Remove ->mode_set callback
> >
> > Removal of the encoder->mode_set callbacks for hdmi/sdvo/dp with small
> > interludes to move a bit of the hdmi/audio state into the pipe config.
> 
> Reviewer: Naresh Kumar
> 
> 
> >   drm/i915/lvds: Remove ->mode_set callback
> >   drm/i915/ddi: Remove ->mode_set callback
> >   drm/i915/dsi: Remove ->mode_set callback
> >   drm/i915: Stop calling encoder->mode_set
> >
> > Final removals of encoder->mode_set callbacks
> 
> Reviewer: Imre

On patches 21-24:
Reviewed-by: Imre Deak <imre.deak@intel.com>

> 
> >   drm/i915: Make ->update_primary_plane infallible
> >   drm/i915: More cargo-culted locking for intel_update_fbc
> >   drm/i915: Sprinkle intel_edp_psr_update over crtc_enable/disable
> >   drm/i915: Inline set_base into crtc_mode_set
> >   drm/i915: Move fb pinning into __intel_set_mode
> >
> > Some shuffling to get the primary->fb handling out of crtc mode_set callbacks
> 
> Reviewer: Akash Goel
> 
> >   drm/i915: Shovel hw setup code out of i9xx_crtc_mode_set
> >   drm/i915: Move lowfreq_avail around a bit in ilk/hsw_crtc_mode_set
> >   drm/i915: Shovel hw setup code out of ilk_crtc_mode_set
> >   drm/i915: Shovel hw setup code out of hsw_crtc_mode_set
> >   drm/i915: Extract i9xx_set_pll_dividers
> >   drm/i915: Extract vlv_prepare_pll
> >
> > gmch pll moved out of crtc mode_set callbacks into ->enable hooks
> 
> Reviewer: Shobhit Kumar
> 
> >   drm/i915: Only update shared dpll state when needed
> >   drm/i915: Extract intel_prepare_shared_dpll
> >   drm/i915: s/ironlake_/intel_ for the enable_share_dpll function
> >
> > Prep polish on the existing shared_dpll code
> 
> Reviewer: Damien (same comment as below)
> 
> >   drm/i915: Check hw state in assert_can_disable_lcpll
> >   drm/i915: Remove spll_refcount for hsw
> >   drm/i915: Clean up WRPLL/SPLL #defines
> >   drm/i915: Make intel_wait_for_pipe_off static
> >   drm/i915: Disable pipe before ports on ilk
> >   drm/i915: Pass port explicitly to intel_ddi_get_hw_state
> >   drm/i915: Unexport intel_ddi_connector_get_hw_state
> >   drm/i915: Move hsw_fdi_link_train into intel_crt.c
> >   drm/i915: Move pch fifo underrun report enabling to hsw_crt_pre_enable
> >   drm/i915: Move the SPLL enabling into hsw_crt_pre_enable
> >   drm/i915: Move lpt_pch_enable int hsw_crt_enable
> >   drm/i915: Move the pch fifo underrun handling into hsw_crt_disable
> >   drm/i915: Move lpt_disable_pch_transcoder into the hsw crt encoder
> >   drm/i915: Move pch fifo underrun report re-enabling into
> >     hsw_crt_post_disable
> >   drm/i915: Move the hsw fdi disabling into hsw_crt_post_disable
> >   drm/i915: Move SPLL disabling into hsw_crt_post_disable
> >
> > Create a new hsw-specific crt encoder which subsumes the entire fdi/pch handling
> > on haswell. This has the nice upshot to make SPLL logically a port-private clock
> > and so removes it from further considerations.
> 
> Reviewer: Paulo
> 
> >   drm/i915: Add a debugfs file for the shared dpll state
> >   drm/i915: Move ddi_pll_sel into the pipe config
> >   drm/i915: State readout and cross-checking for ddi_pll_sel
> >   drm/i915: Precompute static ddi_pll_sel values in encoders
> >   drm/i915: Basic shared dpll support for WRPLLs
> >   drm/i915: Document that the pll->mode_set hook is optional
> >   drm/i915: State readout support for WRPLLs
> >   drm/i915: ->disable hook for WRPLLs
> >   drm/i915: ->enable hook for WRPLLs
> >   drm/i915: Switch to common shared dpll framework for WRPLLs
> >   drm/i915: Only touch WRPLL hw state in enable/disable hooks
> >
> > Convert wrpll handling to the common shared_dpll framework. We need this since
> > runtime pm for dpms requires us to separately track pll refernces from crtcs and
> > active usage by crtcs
> 
> Reviewer: Damien (maybe find someone from the vpg guys who do the pll
> stuff for your project instead)
> 
> >   drm/i915: runtime PM support for DPMS
> 
> Reviewer: Paulo/Imre


[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 490 bytes --]

[-- Attachment #2: Type: text/plain, Size: 159 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx