From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 18/71] drm/i915/chv: Add vlv_pipe_to_channel Date: Mon, 12 May 2014 14:26:01 +0300 Message-ID: <1399893961.4454.1.camel@intelbox> References: <1397039349-10639-1-git-send-email-ville.syrjala@linux.intel.com> <1397039349-10639-19-git-send-email-ville.syrjala@linux.intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0359008472==" Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id A61496E4E0 for ; Mon, 12 May 2014 04:26:21 -0700 (PDT) In-Reply-To: <1397039349-10639-19-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0359008472== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-9mbN0yauCS6cMcINcadK" --=-9mbN0yauCS6cMcINcadK Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2014-04-09 at 13:28 +0300, ville.syrjala@linux.intel.com wrote: > From: Chon Ming Lee >=20 > Cherryview has 3 pipes. Some of the pll dpio offset calculation is > based on pipe number. Need to use vlv_pipe_to_channel to calculate the > correct phy channel to use for the pipe. >=20 > Signed-off-by: Chon Ming Lee Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_drv.h | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) >=20 > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/inte= l_drv.h > index 087e471..e572799 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -544,6 +544,20 @@ vlv_dport_to_channel(struct intel_digital_port *dpor= t) > } > } > =20 > +static inline int > +vlv_pipe_to_channel(enum pipe pipe) > +{ > + switch (pipe) { > + case PIPE_A: > + case PIPE_C: > + return DPIO_CH0; > + case PIPE_B: > + return DPIO_CH1; > + default: > + BUG(); > + } > +} > + > static inline struct drm_crtc * > intel_get_crtc_for_pipe(struct drm_device *dev, int pipe) > { --=-9mbN0yauCS6cMcINcadK Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTcK/JAAoJEORIIAnNuWDF6aMH/2P/LJUnGAuVT4by2oTZqWyB 4TKHJD1BtcahnlaZNlmPuPkcySCv/QTA/AFKYG647AEPnNHRQprYSNuB50we9I7Q vDGqqD41OftSvyFgjP9x7IcDKcabIrRByeEG6q4dlHpTezbTgnP+t67B0ExKQhP2 25dyoDduhcKg+geWbWDle1mQ7V1zTdNuTYjr/MZXSvOg0VouhefNkp36vq5eqAjk +2n1HluvP3xRPHdv2kFtJ1biSUgIq2uAW3D79GlFMzLIPUu5X9pmlhcmTrJuaYIf /KOnWzELD3+uQmHsunK/bBfPCbjvN0xt0+p8L45HUur3hzn2Cnur11pAiIWzY6U= =yLQ0 -----END PGP SIGNATURE----- --=-9mbN0yauCS6cMcINcadK-- --===============0359008472== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0359008472==--