From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 2/2] drm/i915: vlv/chv: fix DSI sideband register accessing Date: Mon, 19 May 2014 18:10:18 +0300 Message-ID: <1400512218.1438.13.camel@intelbox> References: <1400488878-23130-1-git-send-email-imre.deak@intel.com> <1400488878-23130-2-git-send-email-imre.deak@intel.com> <20140519080111.27f6cd65@jbarnes-desktop> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2073884454==" Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 66D176E781 for ; Mon, 19 May 2014 08:13:36 -0700 (PDT) In-Reply-To: <20140519080111.27f6cd65@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============2073884454== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-f95RP8cJ9Yp4PbYK1Wha" --=-f95RP8cJ9Yp4PbYK1Wha Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2014-05-19 at 08:01 -0700, Jesse Barnes wrote: > On Mon, 19 May 2014 11:41:18 +0300 > Imre Deak wrote: >=20 > > So far we used the wrong opcodes to access the DSI registers, so the > > register writes during DSI programming didn't actually succeed and left > > the registers unchanged. This wasn't a problem for the initial modeset, > > where the BIOS-programmed values happened to work, but after resuming > > from s0ix these registers are reset and failing to program them results > > in a blank screen. > >=20 > > Signed-off-by: Imre Deak > > --- > > drivers/gpu/drm/i915/intel_sideband.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > >=20 > > diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i9= 15/intel_sideband.c > > index f3909d5..01d841e 100644 > > --- a/drivers/gpu/drm/i915/intel_sideband.c > > +++ b/drivers/gpu/drm/i915/intel_sideband.c > > @@ -270,13 +270,13 @@ void intel_sbi_write(struct drm_i915_private *dev= _priv, u16 reg, u32 value, > > u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg) > > { > > u32 val =3D 0; > > - vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_FLISDSI, SB_MRD_NP, > > + vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_FLISDSI, SB_CRRDDA_NP= , > > reg, &val); > > return val; > > } > > =20 > > void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32= val) > > { > > - vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_FLISDSI, SB_MWR_NP, > > + vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_FLISDSI, SB_CRWRDA_NP= , > > reg, &val); > > } >=20 > Nice find... is this documented somewhere so we can put a reference > in? Or is it in the Punit HAS somewhere already and we just missed it? I found it in the VLV2_SidebandMsg_HAS, there is already a comment in this file with a reference to it. --Imre --=-f95RP8cJ9Yp4PbYK1Wha Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTeh7aAAoJEORIIAnNuWDFYVoH/2LyoffqASdEuGEHKXzCHmuq WxsJ0PXCXXdzzgV1xBzTHQiM0rueU4YDU0xIXEHKLk5Dr4esFnoUltatUlWpN73j R+d91NDyJnIO3v16o2HLIeS0ynSSnJtlSNcrnGJzLQWwgoLknR75Y/d1wC43MSar jnfzgOvkclk6afKlCQP0oIF9Ix9CfIODJOBzrGumFdvkNhN/rKtWNzRAuMKpKVWQ +BmyKA2dG3Iyy0hYRd72C1bgmI5x69JDJfxj4SzqR4Knm02LCJAuRA0h/xccHQgH qLheCxQdUpXfNqHC/sUlTC0jkvN5kU2/cHnvXFrSTnVgDp4OHMFPW2+EpK5Y3tw= =c6eW -----END PGP SIGNATURE----- --=-f95RP8cJ9Yp4PbYK1Wha-- --===============2073884454== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============2073884454==--