From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 1/2] igt/intel_iosf: rename IOSF sideband opcodes according to the spec Date: Mon, 19 May 2014 18:10:58 +0300 Message-ID: <1400512258.1438.14.camel@intelbox> References: <1400507312-17545-1-git-send-email-imre.deak@intel.com> <20140519080341.78dedec7@jbarnes-desktop> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1040465854==" Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 843136E775 for ; Mon, 19 May 2014 08:11:36 -0700 (PDT) In-Reply-To: <20140519080341.78dedec7@jbarnes-desktop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1040465854== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-xtseKzlvbhjW2nyQkgZv" --=-xtseKzlvbhjW2nyQkgZv Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2014-05-19 at 08:03 -0700, Jesse Barnes wrote: > On Mon, 19 May 2014 16:48:31 +0300 > Imre Deak wrote: >=20 > > These opcodes are not specific for an endpoint, but are the same for al= l > > endpoints. So rename them accordingly, using the name the VLV2 sideband > > HAS uses. Also move the macros to the .c file, since they aren't used > > anywhere else. > >=20 > > Signed-off-by: Imre Deak > > --- > > lib/intel_iosf.c | 24 ++++++++++++++++-------- > > lib/intel_reg.h | 5 ----- > > 2 files changed, 16 insertions(+), 13 deletions(-) > >=20 > > diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c > > index 7e25159..26d6d01 100644 > > --- a/lib/intel_iosf.c > > +++ b/lib/intel_iosf.c > > @@ -8,13 +8,21 @@ > > =20 > > #define TIMEOUT_US 500000 > > =20 > > +/* Standard MMIO read, non-posted */ > > +#define SB_MRD_NP 0x00 > > +/* Standard MMIO write, non-posted */ > > +#define SB_MWR_NP 0x01 > > +/* Private register read, double-word addressing, non-posted */ > > +#define SB_CRRDDA_NP 0x06 > > +/* Private register write, double-word addressing, non-posted */ > > +#define SB_CRWRDA_NP 0x07 > > + > > static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t add= r, > > uint32_t *val) > > { > > int timeout =3D 0; > > uint32_t cmd, devfn, be, bar; > > - int is_read =3D (opcode =3D=3D PUNIT_OPCODE_REG_READ || > > - opcode =3D=3D DPIO_OPCODE_REG_READ); > > + int is_read =3D (opcode =3D=3D SB_CRRDDA_NP || opcode =3D=3D SB_MRD_N= P); > > =20 > > bar =3D 0; > > be =3D 0xf; > > @@ -67,7 +75,7 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opc= ode, uint32_t addr, > > */ > > int intel_punit_read(uint8_t addr, uint32_t *val) > > { > > - return vlv_sideband_rw(IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_READ, addr, = val); > > + return vlv_sideband_rw(IOSF_PORT_PUNIT, SB_CRRDDA_NP, addr, val); > > } > > =20 > > /** > > @@ -82,7 +90,7 @@ int intel_punit_read(uint8_t addr, uint32_t *val) > > */ > > int intel_punit_write(uint8_t addr, uint32_t val) > > { > > - return vlv_sideband_rw(IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_WRITE, addr,= &val); > > + return vlv_sideband_rw(IOSF_PORT_PUNIT, SB_CRWRDA_NP, addr, &val); > > } > > =20 > > /** > > @@ -97,7 +105,7 @@ int intel_punit_write(uint8_t addr, uint32_t val) > > */ > > int intel_nc_read(uint8_t addr, uint32_t *val) > > { > > - return vlv_sideband_rw(IOSF_PORT_NC, PUNIT_OPCODE_REG_READ, addr, val= ); > > + return vlv_sideband_rw(IOSF_PORT_NC, SB_CRRDDA_NP, addr, val); > > } > > =20 > > /** > > @@ -112,7 +120,7 @@ int intel_nc_read(uint8_t addr, uint32_t *val) > > */ > > int intel_nc_write(uint8_t addr, uint32_t val) > > { > > - return vlv_sideband_rw(IOSF_PORT_NC, PUNIT_OPCODE_REG_WRITE, addr, &v= al); > > + return vlv_sideband_rw(IOSF_PORT_NC, SB_CRWRDA_NP, addr, &val); > > } > > =20 > > /** > > @@ -129,7 +137,7 @@ uint32_t intel_dpio_reg_read(uint32_t reg, int phy) > > { > > uint32_t val; > > =20 > > - vlv_sideband_rw(IOSF_PORT_DPIO, DPIO_OPCODE_REG_READ, reg, &val); > > + vlv_sideband_rw(IOSF_PORT_DPIO, SB_MRD_NP, reg, &val); > > return val; > > } > > =20 > > @@ -143,5 +151,5 @@ uint32_t intel_dpio_reg_read(uint32_t reg, int phy) > > */ > > void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy) > > { > > - vlv_sideband_rw(IOSF_PORT_DPIO, DPIO_OPCODE_REG_WRITE, reg, &val); > > + vlv_sideband_rw(IOSF_PORT_DPIO, SB_MWR_NP, reg, &val); > > } > > diff --git a/lib/intel_reg.h b/lib/intel_reg.h > > index 4b3a102..5520624 100644 > > --- a/lib/intel_reg.h > > +++ b/lib/intel_reg.h > > @@ -3576,9 +3576,4 @@ typedef enum { > > #define VLV_IOSF_DATA (VLV_DISPLAY_BASE + 0x2104) > > #define VLV_IOSF_ADDR (VLV_DISPLAY_BASE + 0x2108) > > =20 > > -#define DPIO_OPCODE_REG_READ 0 > > -#define DPIO_OPCODE_REG_WRITE 1 > > -#define PUNIT_OPCODE_REG_READ 6 > > -#define PUNIT_OPCODE_REG_WRITE 7 > > - > > #endif /* _I810_REG_H */ >=20 > Looks fine to me... you have commit access right? Yea, I can push it. --Imre --=-xtseKzlvbhjW2nyQkgZv Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTeh8CAAoJEORIIAnNuWDFjlAH+wTPQIorg+WB+81Mxh8r6Lx3 C0fVLdfEVXzZa8ZOGPQx1gZvVWb9h2JSFHpn2ShjXdzWh+Al/ty/J4REp8F3un8R xJ04EzxMVPFFxferklkNV/3bCizBuMmcw7HpDgw1GZYb6+Sv7+MZDvjC6dhbkAMN GWVOmJBD0SPSlDkC1kGOruy4JI/05styGTyGQrZNHNXLysKZ8eqkdakQQPMMLArJ CDn4/pLbu7R6PQrfujoTLzEQWuKsKYtYja+g7qKFGdlRM0tuk3bfQr9ehPvBAkjZ Df7N/NI80H2YrtX7ROeNalrjDe9TOE/ff95wCFluyzL0JHqdyeYgyEKlXtWPKsk= =SNoa -----END PGP SIGNATURE----- --=-xtseKzlvbhjW2nyQkgZv-- --===============1040465854== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1040465854==--