From mboxrd@z Thu Jan 1 00:00:00 1970 From: sourab.gupta@intel.com Subject: [PATCH 0/3] Replace Blitter ring based flips with MMIO flips Date: Tue, 20 May 2014 16:19:45 +0530 Message-ID: <1400582988-28602-1-git-send-email-sourab.gupta@intel.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id E36BA6E139 for ; Tue, 20 May 2014 03:49:05 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: Akash Goel , Sourab Gupta List-Id: intel-gfx@lists.freedesktop.org From: Sourab Gupta Using MMIO based flips for Media power well residency optimization. The blitter ring is currently being used just for command streamer based flip calls. For pure 3D workloads, with MMIO flips, there will be no use of blitter ring and this will ensure the 100% residency for Media well. Sourab Gupta (3): drm/i915: Replaced Blitter ring based flips with MMIO flips drm/i915: Default to mmio flips on VLV drm/i915: Fix mmio page flip vs mmio set base race drivers/gpu/drm/i915/i915_dma.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 6 ++ drivers/gpu/drm/i915/i915_gem.c | 2 +- drivers/gpu/drm/i915/i915_irq.c | 3 + drivers/gpu/drm/i915/i915_params.c | 5 ++ drivers/gpu/drm/i915/intel_display.c | 135 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 6 ++ 7 files changed, 157 insertions(+), 1 deletion(-) -- 1.8.5.1