From mboxrd@z Thu Jan 1 00:00:00 1970 From: sourab.gupta@intel.com Subject: [PATCH v3 0/2] Replace Blitter ring based flips with MMIO flips Date: Wed, 28 May 2014 12:42:00 +0530 Message-ID: <1401261122-23593-1-git-send-email-sourab.gupta@intel.com> References: <20140527130919.GB14841@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 515886E824 for ; Wed, 28 May 2014 00:11:13 -0700 (PDT) In-Reply-To: <20140527130919.GB14841@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: Deepak S , Akash Goel , Sourab Gupta List-Id: intel-gfx@lists.freedesktop.org From: Sourab Gupta This patch series replaces Blitter ring based flips with MMIO based flips. This is useful for Media power well residency optimization. These may be enabled on architectures where Render and Blitter engines reside in different power wells. The blitter ring is currently being used just for command streamer based flip calls. For pure 3D workloads, with MMIO flips, there will be no use of blitter ring and this will ensure the 100% residency for Media well. Sourab Gupta (2): drm/i915: Replaced Blitter ring based flips with MMIO flips drm/i915: Default to mmio flips on VLV drivers/gpu/drm/i915/i915_dma.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 8 ++ drivers/gpu/drm/i915/i915_gem.c | 2 +- drivers/gpu/drm/i915/i915_irq.c | 3 + drivers/gpu/drm/i915/i915_params.c | 5 ++ drivers/gpu/drm/i915/intel_display.c | 152 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 6 ++ 7 files changed, 176 insertions(+), 1 deletion(-) -- 1.8.5.1