From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 1/2] drm/i915: use power well count instead of reading hw state when checking status Date: Wed, 28 May 2014 21:09:27 +0300 Message-ID: <1401300567.3158.11.camel@ideak-mobl> References: <1401295810-2081-1-git-send-email-jbarnes@virtuousgeek.org> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id DECB66E8BE for ; Wed, 28 May 2014 11:09:30 -0700 (PDT) In-Reply-To: <1401295810-2081-1-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, 2014-05-28 at 09:50 -0700, Jesse Barnes wrote: > This saves many ms per call on my BYT by eliminating Punit communication > from the hw readout paths. > > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/intel_pm.c | 8 +++----- > 1 file changed, 3 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 452518f..09a3677 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -5572,13 +5572,11 @@ bool intel_display_power_enabled(struct drm_i915_private *dev_priv, > > mutex_lock(&power_domains->lock); > for_each_power_well_rev(i, power_well, BIT(domain), power_domains) { > - if (power_well->always_on) > + if (power_well->always_on || power_well->count) > continue; > > - if (!power_well->ops->is_enabled(dev_priv, power_well)) { > - is_enabled = false; > - break; > - } > + is_enabled = false; > + break; > } > mutex_unlock(&power_domains->lock); This was meant to return the HW state vs. the state based on the refcount. It would work in the above way now, because we enable all power wells for driver init time, but if remove that in the future the two states may not match. Perhaps we could maintain a cached version of the HW state in the power_well struct that we set in the sync_hw handler and update whenever we turn on/off the wells. --Imre