From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 4/4] drm/i915: make sure PC8 is enabled on suspend and disabled on resume Date: Fri, 30 May 2014 16:37:53 +0300 Message-ID: <1401457073.24060.48.camel@intelbox> References: <1401397897-4655-1-git-send-email-jbarnes@virtuousgeek.org> <1401397897-4655-4-git-send-email-jbarnes@virtuousgeek.org> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0279183652==" Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id CB9BA6E165 for ; Fri, 30 May 2014 06:37:56 -0700 (PDT) In-Reply-To: <1401397897-4655-4-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org, kristen@linux.intel.com List-Id: intel-gfx@lists.freedesktop.org --===============0279183652== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-Xy17Zi+PW4w70NTOhvuP" --=-Xy17Zi+PW4w70NTOhvuP Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2014-05-29 at 14:11 -0700, Jesse Barnes wrote: > From: Kristen Carlson Accardi >=20 > This matches the runtime suspend paths and allows the system to enter > the lowest power mode at freeze time. >=20 > Signed-off-by: Kristen Carlson Accardi > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/i915_drv.c | 6 ++++++ > 1 file changed, 6 insertions(+) >=20 > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_= drv.c > index b6211d7..24dc856 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -558,6 +558,9 @@ static int i915_drm_freeze(struct drm_device *dev) > =20 > intel_display_set_init_power(dev_priv, false); > =20 > + if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > + hsw_enable_pc8(dev_priv); > + > return 0; > } > =20 > @@ -618,6 +621,9 @@ static int __i915_drm_thaw(struct drm_device *dev, bo= ol restore_gtt_mappings) > { > struct drm_i915_private *dev_priv =3D dev->dev_private; > =20 > + if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > + hsw_disable_pc8(dev_priv); I would put this before we access any of the HW regs in thaw_early() and correspondingly the above call to hsw_enable_pc8() to suspend_late() before we call pci_disable_device(). With that change this is: Reviewed-by: Imre Deak > + > if (drm_core_check_feature(dev, DRIVER_MODESET) && > restore_gtt_mappings) { > mutex_lock(&dev->struct_mutex); --=-Xy17Zi+PW4w70NTOhvuP Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJTiImxAAoJEORIIAnNuWDF3a4IAIllpOy2kK6R8ldkWQ8FTzt9 UPIGQXkwRr8gBNUjusm7CNGp5FWa4o+KqxiUu+km3q8xfMe4CRIcnvvxl3Rj8XEc uZgFbW96qGlTFfXvC6epoXihg+YCvy/jQGQjNyGJB89Z6k5VePj0xowud6QpO49V KnyPCWPRzEFklrnojfAk8nb+mY7FKfgXacmTB93D3uYY2ssg3toaYYrYQrbP2iMG DAsNGfqyIyRkoPqiCp8xY0QMsiHrP8XqgTxkLHQaMX7bktyzjEipOBVlwAlglTZr Lvn+foeQc0ESvrWyuI0SWyWaCD+leKGLgB1ZkIeE/84CGpufjs0QxHYweKw6NWk= =BN+M -----END PGP SIGNATURE----- --=-Xy17Zi+PW4w70NTOhvuP-- --===============0279183652== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0279183652==--