From mboxrd@z Thu Jan 1 00:00:00 1970 From: michel.thierry@intel.com Subject: [PATCH] drm/i915: Implement WaDisableFenceDestinationToSLM:bdw Date: Wed, 4 Jun 2014 15:06:18 +0100 Message-ID: <1401890778-14192-1-git-send-email-michel.thierry@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 6CAB46E109 for ; Wed, 4 Jun 2014 07:06:53 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org From: Michel Thierry HDC_CHICKEN0 bit 14 (Fence Destination To SLM Disable) must be programmed by software to 1h (Disable) to work around a LSLM unit issue. WaDisableFenceDestinationToSLM is only needed for BDW E,F step. Issue: APDEV-3096 Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 247be2a..4ff95a8 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4672,6 +4672,7 @@ enum punit_power_well { /* GEN8 chicken */ #define HDC_CHICKEN0 0x7300 +#define HDC_FENCE_DESTINATION_TO_SLM_DISABLE (1<<14) #define HDC_FORCE_NON_COHERENT (1<<4) /* WaCatErrorRejectionIssue */ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ee27d74..3968078 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5330,8 +5330,10 @@ static void gen8_init_clock_gating(struct drm_device *dev) * workaround for for a possible hang in the unlikely event a TLB * invalidation occurs during a PSD flush. */ + /* WaDisableFenceDestinationToSLM:bdw */ I915_WRITE(HDC_CHICKEN0, I915_READ(HDC_CHICKEN0) | + _MASKED_BIT_ENABLE(HDC_FENCE_DESTINATION_TO_SLM_DISABLE) | _MASKED_BIT_ENABLE(HDC_FORCE_NON_COHERENT)); /* WaVSRefCountFullforceMissDisable:bdw */ -- 1.9.0