From mboxrd@z Thu Jan 1 00:00:00 1970 From: oscar.mateo@intel.com Subject: [PATCH 2/8] drm/i915/bdw: If we are in reset, switch the GEN8 ppgtt synchronously Date: Wed, 18 Jun 2014 17:15:36 +0100 Message-ID: <1403108138-6366-2-git-send-email-oscar.mateo@intel.com> References: <1403108138-6366-1-git-send-email-oscar.mateo@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 6D7C46E655 for ; Wed, 18 Jun 2014 09:20:13 -0700 (PDT) In-Reply-To: <1403108138-6366-1-git-send-email-oscar.mateo@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org From: Oscar Mateo If this comment is true for GEN6 and GEN7, I imagine it is for GEN8 as well: If we're in reset, we can assume the GPU is sufficiently idle to manually frob these bits. Ideally we could use the ring functions, except our error handling makes it quite difficult (can't use intel_ring_begin, ring->flush, or intel_ring_advance). This exception was lost (wrongly, I suspect) in: commit eeb9488e751a0a6401e7516a893efaf9d1f77fb5 Author: Ben Widawsky Date: Fri Dec 6 14:11:10 2013 -0800 drm/i915: Extract mm switching to function In order to do the full context switch with address space, it's convenient to have a way to switch the address space. We already have this in our code - just pull it out to be called by the context switch code later. v2: Rebased on BDW support. Required adding BDW. Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_gem_gtt.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index ad5c85b..49f103f 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -263,10 +263,23 @@ static int gen8_mm_sync_switch(struct i915_hw_ppgtt *ppgtt, static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt, struct intel_engine_cs *ring) { + struct drm_device *dev = ppgtt->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + int used_pd; int i, ret; + /* If we're in reset, we can assume the GPU is sufficiently idle to + * manually frob these bits. Ideally we could use the ring functions, + * except our error handling makes it quite difficult (can't use + * intel_ring_begin, ring->flush, or intel_ring_advance) + * + * FIXME: We should try not to special case reset + */ + if (i915_reset_in_progress(&dev_priv->gpu_error)) + return ppgtt->sync_switch_mm(ppgtt, ring); + /* bit of a hack to find the actual last used pd */ - int used_pd = ppgtt->num_pd_entries / GEN8_PDES_PER_PAGE; + used_pd = ppgtt->num_pd_entries / GEN8_PDES_PER_PAGE; for (i = used_pd - 1; i >= 0; i--) { dma_addr_t addr = ppgtt->pd_dma_addr[i]; -- 1.9.0