From mboxrd@z Thu Jan 1 00:00:00 1970 From: bradley.d.volkin@intel.com Subject: [RFC 4/4] drm/i915: Dispatch the shadow batch buffer Date: Wed, 18 Jun 2014 09:36:16 -0700 Message-ID: <1403109376-23452-5-git-send-email-bradley.d.volkin@intel.com> References: <1403109376-23452-1-git-send-email-bradley.d.volkin@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 59F796E6E2 for ; Wed, 18 Jun 2014 09:36:10 -0700 (PDT) In-Reply-To: <1403109376-23452-1-git-send-email-bradley.d.volkin@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org From: Brad Volkin This is useful for testing the batch pool code with aliasing PPGTT. It doesn't work with full PPGTT though; the GPU hangs and the whole UI is corrupted. We need fixes for the secure dispatch path to enable this for real. Signed-off-by: Brad Volkin --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 37 ++++++++++++++++-------------- 1 file changed, 20 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 0b263aa..981f66b 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1321,31 +1321,34 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, goto err; /* - * XXX: Actually do this when enabling batch copy... - * * Set the DISPATCH_SECURE bit to remove the NON_SECURE bit * from MI_BATCH_BUFFER_START commands issued in the * dispatch_execbuffer implementations. We specifically don't * want that set when the command parser is enabled. */ + flags |= I915_DISPATCH_SECURE; } - /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure - * batch" bit. Hence we need to pin secure batches into the global gtt. - * hsw should have this fixed, but bdw mucks it up again. */ - if (flags & I915_DISPATCH_SECURE && - !batch_obj->has_global_gtt_mapping) { - /* When we have multiple VMs, we'll need to make sure that we - * allocate space first */ - struct i915_vma *vma = i915_gem_obj_to_ggtt(batch_obj); - BUG_ON(!vma); - vma->bind_vma(vma, batch_obj->cache_level, GLOBAL_BIND); - } + if (!shadow_batch_obj) { + /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure + * batch" bit. Hence we need to pin secure batches into the global gtt. + * hsw should have this fixed, but bdw mucks it up again. */ + if (flags & I915_DISPATCH_SECURE && + !batch_obj->has_global_gtt_mapping) { + /* When we have multiple VMs, we'll need to make sure that we + * allocate space first */ + struct i915_vma *vma = i915_gem_obj_to_ggtt(batch_obj); + BUG_ON(!vma); + vma->bind_vma(vma, batch_obj->cache_level, GLOBAL_BIND); + } - if (flags & I915_DISPATCH_SECURE) - exec_start += i915_gem_obj_ggtt_offset(batch_obj); - else - exec_start += i915_gem_obj_offset(batch_obj, vm); + if (flags & I915_DISPATCH_SECURE) + exec_start += i915_gem_obj_ggtt_offset(batch_obj); + else + exec_start += i915_gem_obj_offset(batch_obj, vm); + } else { + exec_start += i915_gem_obj_ggtt_offset(shadow_batch_obj); + } ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas); if (ret) -- 1.8.3.2