public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: oscar.mateo@intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 1/8] drm/i915: Extract context backing object allocation
Date: Thu,  3 Jul 2014 16:27:58 +0100	[thread overview]
Message-ID: <1404401285-19918-1-git-send-email-oscar.mateo@intel.com> (raw)

From: Oscar Mateo <oscar.mateo@intel.com>

This is preparatory work for Execlists: we plan to use it later to
allocate our own context objects (since Logical Ring Contexts do
not have the same kind of backing objects).

No functional changes.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c | 54 +++++++++++++++++++++------------
 1 file changed, 35 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 0d2c75b..9f8d78b 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -198,6 +198,36 @@ void i915_gem_context_free(struct kref *ctx_ref)
 	kfree(ctx);
 }
 
+static struct drm_i915_gem_object *
+i915_gem_alloc_context_obj(struct drm_device *dev, size_t size)
+{
+	struct drm_i915_gem_object *obj;
+	int ret;
+
+	obj = i915_gem_alloc_object(dev, size);
+	if (obj == NULL)
+		return ERR_PTR(-ENOMEM);
+
+	/*
+	 * Try to make the context utilize L3 as well as LLC.
+	 *
+	 * On VLV we don't have L3 controls in the PTEs so we
+	 * shouldn't touch the cache level, especially as that
+	 * would make the object snooped which might have a
+	 * negative performance impact.
+	 */
+	if (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev)) {
+		ret = i915_gem_object_set_cache_level(obj, I915_CACHE_L3_LLC);
+		/* Failure shouldn't ever happen this early */
+		if (WARN_ON(ret)) {
+			drm_gem_object_unreference(&obj->base);
+			return ERR_PTR(ret);
+		}
+	}
+
+	return obj;
+}
+
 static struct i915_hw_ppgtt *
 create_vm_for_ctx(struct drm_device *dev, struct intel_context *ctx)
 {
@@ -234,27 +264,13 @@ __create_hw_context(struct drm_device *dev,
 	list_add_tail(&ctx->link, &dev_priv->context_list);
 
 	if (dev_priv->hw_context_size) {
-		ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
-		if (ctx->obj == NULL) {
-			ret = -ENOMEM;
+		struct drm_i915_gem_object *obj =
+				i915_gem_alloc_context_obj(dev, dev_priv->hw_context_size);
+		if (IS_ERR(obj)) {
+			ret = PTR_ERR(obj);
 			goto err_out;
 		}
-
-		/*
-		 * Try to make the context utilize L3 as well as LLC.
-		 *
-		 * On VLV we don't have L3 controls in the PTEs so we
-		 * shouldn't touch the cache level, especially as that
-		 * would make the object snooped which might have a
-		 * negative performance impact.
-		 */
-		if (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev)) {
-			ret = i915_gem_object_set_cache_level(ctx->obj,
-							      I915_CACHE_L3_LLC);
-			/* Failure shouldn't ever happen this early */
-			if (WARN_ON(ret))
-				goto err_out;
-		}
+		ctx->obj = obj;
 	}
 
 	/* Default context will never have a file_priv */
-- 
1.9.0

             reply	other threads:[~2014-07-03 15:32 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-03 15:27 oscar.mateo [this message]
2014-07-03 15:27 ` [PATCH 2/8] drm/i915: Emphasize that ctx->obj & ctx->id refer to the legacy hw render context oscar.mateo
2014-07-03 15:28 ` [PATCH 3/8] drm/i915: Emphasize that ctx->id is merely a user handle oscar.mateo
2014-07-03 15:28 ` [PATCH 4/8] drm/i915: Add kerneldoc comments to the intel_context struct oscar.mateo
2014-07-03 15:38   ` Mateo Lozano, Oscar
2014-07-08  9:29     ` Daniel Vetter
2014-07-08 10:28       ` Daniel Vetter
2014-07-03 15:28 ` [PATCH 5/8] drm/i915: Extract ringbuffer destroy & generalize alloc to take a ringbuf oscar.mateo
2014-07-03 15:28 ` [PATCH 6/8] drm/i915: Generalize ring_space " oscar.mateo
2014-07-03 15:28 ` [PATCH 7/8] drm/i915: Generalize intel_ring_get_tail " oscar.mateo
2014-07-03 15:28 ` [PATCH 8/8] drm/i915: Extract the actual workload submission mechanism from execbuffer oscar.mateo
2014-07-08  9:39 ` [PATCH 1/8] drm/i915: Extract context backing object allocation Chris Wilson
2014-07-08 10:31   ` Daniel Vetter
  -- strict thread matches above, loose matches on Subject: below --
2014-06-26 13:24 [PATCH 0/8] Execlists prep-work (II) oscar.mateo
2014-06-26 13:24 ` [PATCH 1/8] drm/i915: Extract context backing object allocation oscar.mateo
2014-06-30 20:46   ` Jesse Barnes

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1404401285-19918-1-git-send-email-oscar.mateo@intel.com \
    --to=oscar.mateo@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox