From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: [PATCH 1/2] drm/i915/gen8: Invalidate TLBs before PDP reload Date: Thu, 3 Jul 2014 15:01:49 -0700 Message-ID: <1404424910-7234-1-git-send-email-benjamin.widawsky@intel.com> References: <1404238671-18760-1-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id A76AF6E782 for ; Thu, 3 Jul 2014 15:02:02 -0700 (PDT) In-Reply-To: <1404238671-18760-1-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Intel GFX Cc: Ben Widawsky , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org This is a spec requirement for all rings. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_context.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 5b4a9a0..1ac648f 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -870,6 +870,9 @@ int i915_switch_context(struct intel_engine_cs *ring, if (from == to && !to->remap_slice) return 0; + if (IS_GEN8(ring->dev)) + WARN_ON(ring->flush(ring, I915_GEM_GPU_DOMAINS, 0)); + if (ring->id == RCS) return do_switch_rcs(ring, from, to); else -- 2.0.1