From mboxrd@z Thu Jan 1 00:00:00 1970 From: Todd Previte Subject: [PATCH 06/12] drm/i915: Add a constant and function for getting the Displayport compliance failsafe video mode Date: Mon, 14 Jul 2014 12:10:41 -0700 Message-ID: <1405365047-6866-7-git-send-email-tprevite@gmail.com> References: <1405365047-6866-1-git-send-email-tprevite@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-pa0-f43.google.com (mail-pa0-f43.google.com [209.85.220.43]) by gabe.freedesktop.org (Postfix) with ESMTP id E9F986E46D for ; Mon, 14 Jul 2014 12:11:27 -0700 (PDT) Received: by mail-pa0-f43.google.com with SMTP id lf10so5495165pab.30 for ; Mon, 14 Jul 2014 12:11:27 -0700 (PDT) In-Reply-To: <1405365047-6866-1-git-send-email-tprevite@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Adds the failsafe mode (640x480@60hz) as a constant and a function that retrieves it. These are designed for use in Displayport compliance testing only and should not be used outside that context. Signed-off-by: Todd Previte --- drivers/gpu/drm/i915/intel_dp.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6c8f222..33b6dc9 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -82,6 +82,18 @@ static const struct dp_link_dpll chv_dpll[] = { { .p1 = 2, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 } } }; +/* VESA 640x480@60Hz - DP compliance failsafe mode */ +static struct drm_display_mode dp_failsafe_mode = { + DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 664, 752, + 800, 0, 480, 490, 492, 525, 0, + DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) +}; + +struct drm_display_mode *intel_dp_get_failsafe_mode(void) +{ + return &dp_failsafe_mode; +} + /** * is_edp - is the given port attached to an eDP panel (either CPU or PCH) * @intel_dp: DP struct -- 1.9.1