[PATCH 07/12] drm/i915: Update EDID automated test function for Displayport compliance

[Todd Previte <tprevite@gmail.com>]

Implements an updated version of the automated testing function that handles
Displayport compliance for EDID operations.

Signed-off-by: Todd Previte <tprevite@gmail.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 77 ++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 76 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 33b6dc9..88f1bbe 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3408,7 +3408,82 @@ intel_dp_autotest_video_pattern(struct intel_dp *intel_dp)
 static uint8_t
 intel_dp_autotest_edid(struct intel_dp *intel_dp)
 {
-	uint8_t test_result = DP_TEST_NAK;
+	struct drm_connector *connector = &intel_dp->attached_connector->base;
+	struct i2c_adapter *adapter = &intel_dp->aux.ddc;
+	struct edid *edid_read = NULL;
+	uint8_t *edid_data = NULL;
+	uint8_t test_result = DP_TEST_NAK, checksum = 0;
+	uint32_t i = 0, ret = 0;
+	struct drm_display_mode *use_mode = NULL;
+	int mode_count = 0;
+	struct drm_mode_set modeset;
+
+	DRM_DEBUG_KMS("Displayport: EDID automated test\n");
+
+	/* Reset the NACK/DEFER counters */
+	intel_dp->aux.i2c_nack_count = 0;
+	intel_dp->aux.i2c_defer_count = 0;
+	/* Now read out the EDID */
+	edid_read = drm_get_edid(connector, adapter);
+
+	if (edid_read == NULL) {
+		/* Check for NACKs/DEFERs, goto failsafe if detected
+		   (DP CTS 1.2 Core Rev 1.1, 4.2.2.4, 4.2.2.5) */
+		if (intel_dp->aux.i2c_nack_count > 0 ||
+			intel_dp->aux.i2c_defer_count > 0)
+			DRM_DEBUG_KMS("Displayport: EDID read generated %d I2C NACKs, %d DEFERs\n",
+						  intel_dp->aux.i2c_nack_count,
+						  intel_dp->aux.i2c_defer_count);
+		goto failsafe;
+	}
+
+	/* FIXME: Need to determine how to detect E-DDC here (4.2.2.9) */
+	edid_data = (uint8_t *) edid_read;
+
+	if (intel_dp_compute_edid_checksum(edid_data, &checksum)) {
+		/* Write the checksum to EDID checksum register */
+		ret = drm_dp_dpcd_write(&intel_dp->aux,
+								DP_TEST_EDID_CHECKSUM,
+								&edid_read->checksum, 1);
+		/* Reponse is ACK and and checksum written */
+		test_result = DP_TEST_ACK | DP_TEST_EDID_CHECKSUM_WRITE;
+	} else {
+		/* Invalid checksum - EDID corruption detection test */
+		goto failsafe;
+	}
+
+	/* Update EDID modes */
+	mode_count = intel_connector_update_modes(connector, edid_read);
+	if (!mode_count) {
+		DRM_DEBUG_KMS("Displayport: Mode update failed\n");
+		goto failsafe;
+	}
+
+	/* Get the EDID preferred mode if available */
+	use_mode = intel_dp_get_edid_preferred_mode(intel_dp);
+	if (use_mode == NULL)
+		goto failsafe;
+	else
+		goto set_mode;
+
+failsafe:
+	DRM_DEBUG_KMS("Displayport: Setting failsafe display mode\n");
+	use_mode = intel_dp_get_failsafe_mode();
+	/* FIXME: <TAP> Need to set DP to 6bpc here as well */
+	intel_dp->attached_connector->encoder->new_crtc->config.pipe_bpp = 18;
+
+set_mode:
+	/* Configure the display mode necessary */
+	modeset.connectors = &connector;
+	modeset.num_connectors = 1;
+	modeset.crtc = connector->encoder->crtc;
+	modeset.fb = modeset.crtc->primary->fb;
+	modeset.x = 0;
+	modeset.y = 0;
+	modeset.mode = use_mode;
+	/* Set the config */
+	intel_dp_set_config(&modeset);
+
 	return test_result;
 }
 
-- 
1.9.1