From: Thomas Daniel <thomas.daniel@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 43/43] drm/i915/bdw: Pin the ringbuffer backing object to GGTT on-demand
Date: Thu, 24 Jul 2014 17:04:51 +0100 [thread overview]
Message-ID: <1406217891-8912-44-git-send-email-thomas.daniel@intel.com> (raw)
In-Reply-To: <1406217891-8912-1-git-send-email-thomas.daniel@intel.com>
From: Oscar Mateo <oscar.mateo@intel.com>
Same as with the context, pinning to GGTT regardless is harmful (it
badly fragments the GGTT and can even exhaust it).
Unfortunately, this case is also more complex than the previous one
because we need to map and access the ringbuffer in several places
along the execbuffer path (and we cannot make do by leaving the
default ringbuffer pinned, as before). Also, the context object
itself contains a pointer to the ringbuffer address that we have to
keep updated if we are going to allow the ringbuffer to move around.
v2: Same as with the context pinning, we cannot really do it during
an interrupt. Also, pin the default ringbuffers objects regardless
(makes error capture a lot easier).
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
---
drivers/gpu/drm/i915/i915_gem.c | 5 +-
drivers/gpu/drm/i915/intel_lrc.c | 80 ++++++++++++++++++++---------
drivers/gpu/drm/i915/intel_ringbuffer.c | 83 ++++++++++++++++++-------------
drivers/gpu/drm/i915/intel_ringbuffer.h | 3 ++
4 files changed, 111 insertions(+), 60 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 42faaa3..1a852b9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2498,13 +2498,16 @@ static void i915_gem_free_request(struct drm_i915_gem_request *request)
if (ctx) {
struct intel_engine_cs *ring = request->ring;
+ struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
struct drm_i915_gem_object *ctx_obj = ctx->engine[ring->id].state;
atomic_t *unpin_count = &ctx->engine[ring->id].unpin_count;
if (ctx_obj) {
if (atomic_dec_return(unpin_count) == 0 &&
- ctx != ring->default_context)
+ ctx != ring->default_context) {
+ intel_unpin_ringbuffer_obj(ringbuf);
i915_gem_object_ggtt_unpin(ctx_obj);
+ }
}
i915_gem_context_unreference(ctx);
}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 9fa8e35..4ca8278 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -315,7 +315,9 @@ static void execlists_elsp_write(struct intel_engine_cs *ring,
spin_unlock_irqrestore(&dev_priv->uncore.lock, flags);
}
-static int execlists_ctx_write_tail(struct drm_i915_gem_object *ctx_obj, u32 tail)
+static int execlists_update_context(struct drm_i915_gem_object *ctx_obj,
+ struct drm_i915_gem_object *ring_obj,
+ u32 tail)
{
struct page *page;
uint32_t *reg_state;
@@ -324,6 +326,7 @@ static int execlists_ctx_write_tail(struct drm_i915_gem_object *ctx_obj, u32 tai
reg_state = kmap_atomic(page);
reg_state[CTX_RING_TAIL+1] = tail;
+ reg_state[CTX_RING_BUFFER_START+1] = i915_gem_obj_ggtt_offset(ring_obj);
kunmap_atomic(reg_state);
@@ -334,21 +337,25 @@ static int execlists_submit_context(struct intel_engine_cs *ring,
struct intel_context *to0, u32 tail0,
struct intel_context *to1, u32 tail1)
{
- struct drm_i915_gem_object *ctx_obj0;
+ struct drm_i915_gem_object *ctx_obj0 = to0->engine[ring->id].state;
+ struct intel_ringbuffer *ringbuf0 = to0->engine[ring->id].ringbuf;
struct drm_i915_gem_object *ctx_obj1 = NULL;
+ struct intel_ringbuffer *ringbuf1 = NULL;
- ctx_obj0 = to0->engine[ring->id].state;
BUG_ON(!ctx_obj0);
BUG_ON(!i915_gem_obj_is_pinned(ctx_obj0));
+ BUG_ON(!i915_gem_obj_is_pinned(ringbuf0->obj));
- execlists_ctx_write_tail(ctx_obj0, tail0);
+ execlists_update_context(ctx_obj0, ringbuf0->obj, tail0);
if (to1) {
+ ringbuf1 = to1->engine[ring->id].ringbuf;
ctx_obj1 = to1->engine[ring->id].state;
BUG_ON(!ctx_obj1);
BUG_ON(!i915_gem_obj_is_pinned(ctx_obj1));
+ BUG_ON(!i915_gem_obj_is_pinned(ringbuf1->obj));
- execlists_ctx_write_tail(ctx_obj1, tail1);
+ execlists_update_context(ctx_obj1, ringbuf1->obj, tail1);
}
execlists_elsp_write(ring, ctx_obj0, ctx_obj1);
@@ -772,6 +779,7 @@ static int logical_ring_alloc_seqno(struct intel_engine_cs *ring,
if (ring->preallocated_lazy_request == NULL) {
struct drm_i915_gem_request *request;
+ struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
struct drm_i915_gem_object *ctx_obj = ctx->engine[ring->id].state;
atomic_t *unpin_count = &ctx->engine[ring->id].unpin_count;
@@ -787,6 +795,13 @@ static int logical_ring_alloc_seqno(struct intel_engine_cs *ring,
kfree(request);
return ret;
}
+
+ ret = intel_pin_and_map_ringbuffer_obj(ring->dev, ringbuf);
+ if (ret) {
+ i915_gem_object_ggtt_unpin(ctx_obj);
+ kfree(request);
+ return ret;
+ }
}
/* Hold a reference to the context this request belongs to
@@ -1546,7 +1561,13 @@ populate_lr_context(struct intel_context *ctx, struct drm_i915_gem_object *ctx_o
reg_state[CTX_RING_TAIL] = RING_TAIL(ring->mmio_base);
reg_state[CTX_RING_TAIL+1] = 0;
reg_state[CTX_RING_BUFFER_START] = RING_START(ring->mmio_base);
+
+ ret = i915_gem_obj_ggtt_pin(ring_obj, PAGE_SIZE, 0);
+ if (ret)
+ goto error;
reg_state[CTX_RING_BUFFER_START+1] = i915_gem_obj_ggtt_offset(ring_obj);
+ i915_gem_object_ggtt_unpin(ring_obj);
+
reg_state[CTX_RING_BUFFER_CONTROL] = RING_CTL(ring->mmio_base);
reg_state[CTX_RING_BUFFER_CONTROL+1] =
((ringbuf->size - PAGE_SIZE) & RING_NR_PAGES) | RING_VALID;
@@ -1599,13 +1620,14 @@ populate_lr_context(struct intel_context *ctx, struct drm_i915_gem_object *ctx_o
reg_state[CTX_R_PWR_CLK_STATE+1] = 0;
}
+error:
kunmap_atomic(reg_state);
ctx_obj->dirty = 1;
set_page_dirty(page);
i915_gem_object_unpin_pages(ctx_obj);
- return 0;
+ return ret;
}
/**
@@ -1627,10 +1649,12 @@ void intel_lr_context_free(struct intel_context *ctx)
struct intel_ringbuffer *ringbuf = ctx->engine[i].ringbuf;
struct intel_engine_cs *ring = ringbuf->ring;
+ if (ctx == ring->default_context) {
+ intel_unpin_ringbuffer_obj(ringbuf);
+ i915_gem_object_ggtt_unpin(ctx_obj);
+ }
intel_destroy_ringbuffer_obj(ringbuf);
kfree(ringbuf);
- if (ctx == ring->default_context)
- i915_gem_object_ggtt_unpin(ctx_obj);
drm_gem_object_unreference(&ctx_obj->base);
}
}
@@ -1706,11 +1730,8 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
if (!ringbuf) {
DRM_DEBUG_DRIVER("Failed to allocate ringbuffer %s\n",
ring->name);
- if (is_global_default_ctx)
- i915_gem_object_ggtt_unpin(ctx_obj);
- drm_gem_object_unreference(&ctx_obj->base);
ret = -ENOMEM;
- return ret;
+ goto error_unpin_ctx;
}
ringbuf->ring = ring;
@@ -1722,22 +1743,28 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
ringbuf->space = ringbuf->size;
ringbuf->last_retired_head = -1;
- /* TODO: For now we put this in the mappable region so that we can reuse
- * the existing ringbuffer code which ioremaps it. When we start
- * creating many contexts, this will no longer work and we must switch
- * to a kmapish interface.
- */
- ret = intel_alloc_ringbuffer_obj(dev, ringbuf);
- if (ret) {
- DRM_DEBUG_DRIVER("Failed to allocate ringbuffer obj %s: %d\n",
- ring->name, ret);
- goto error;
+ if (ringbuf->obj == NULL) {
+ ret = intel_alloc_ringbuffer_obj(dev, ringbuf);
+ if (ret) {
+ DRM_DEBUG_DRIVER("Failed to allocate ringbuffer obj %s: %d\n",
+ ring->name, ret);
+ goto error_free_rbuf;
+ }
+
+ if (is_global_default_ctx) {
+ ret = intel_pin_and_map_ringbuffer_obj(dev, ringbuf);
+ if (ret) {
+ DRM_ERROR("Failed to pin and map ringbuffer %s: %d\n",
+ ring->name, ret);
+ goto error_destroy_rbuf;
+ }
+ }
+
}
ret = populate_lr_context(ctx, ctx_obj, ring, ringbuf);
if (ret) {
DRM_DEBUG_DRIVER("Failed to populate LRC: %d\n", ret);
- intel_destroy_ringbuffer_obj(ringbuf);
goto error;
}
@@ -1753,7 +1780,6 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
DRM_ERROR("Init render state failed: %d\n", ret);
ctx->engine[ring->id].ringbuf = NULL;
ctx->engine[ring->id].state = NULL;
- intel_destroy_ringbuffer_obj(ringbuf);
goto error;
}
ctx->rcs_initialized = true;
@@ -1762,7 +1788,13 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
return 0;
error:
+ if (is_global_default_ctx)
+ intel_unpin_ringbuffer_obj(ringbuf);
+error_destroy_rbuf:
+ intel_destroy_ringbuffer_obj(ringbuf);
+error_free_rbuf:
kfree(ringbuf);
+error_unpin_ctx:
if (is_global_default_ctx)
i915_gem_object_ggtt_unpin(ctx_obj);
drm_gem_object_unreference(&ctx_obj->base);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 6e604c9..020588c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1513,13 +1513,42 @@ static int init_phys_status_page(struct intel_engine_cs *ring)
return 0;
}
-void intel_destroy_ringbuffer_obj(struct intel_ringbuffer *ringbuf)
+void intel_unpin_ringbuffer_obj(struct intel_ringbuffer *ringbuf)
{
- if (!ringbuf->obj)
- return;
-
iounmap(ringbuf->virtual_start);
+ ringbuf->virtual_start = NULL;
i915_gem_object_ggtt_unpin(ringbuf->obj);
+}
+
+int intel_pin_and_map_ringbuffer_obj(struct drm_device *dev,
+ struct intel_ringbuffer *ringbuf)
+{
+ struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_gem_object *obj = ringbuf->obj;
+ int ret;
+
+ ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE, PIN_MAPPABLE);
+ if (ret)
+ return ret;
+
+ ret = i915_gem_object_set_to_gtt_domain(obj, true);
+ if (ret) {
+ i915_gem_object_ggtt_unpin(obj);
+ return ret;
+ }
+
+ ringbuf->virtual_start = ioremap_wc(dev_priv->gtt.mappable_base +
+ i915_gem_obj_ggtt_offset(obj), ringbuf->size);
+ if (ringbuf->virtual_start == NULL) {
+ i915_gem_object_ggtt_unpin(obj);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+void intel_destroy_ringbuffer_obj(struct intel_ringbuffer *ringbuf)
+{
drm_gem_object_unreference(&ringbuf->obj->base);
ringbuf->obj = NULL;
}
@@ -1527,12 +1556,7 @@ void intel_destroy_ringbuffer_obj(struct intel_ringbuffer *ringbuf)
int intel_alloc_ringbuffer_obj(struct drm_device *dev,
struct intel_ringbuffer *ringbuf)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
struct drm_i915_gem_object *obj;
- int ret;
-
- if (ringbuf->obj)
- return 0;
obj = NULL;
if (!HAS_LLC(dev))
@@ -1545,30 +1569,9 @@ int intel_alloc_ringbuffer_obj(struct drm_device *dev,
/* mark ring buffers as read-only from GPU side by default */
obj->gt_ro = 1;
- ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE, PIN_MAPPABLE);
- if (ret)
- goto err_unref;
-
- ret = i915_gem_object_set_to_gtt_domain(obj, true);
- if (ret)
- goto err_unpin;
-
- ringbuf->virtual_start =
- ioremap_wc(dev_priv->gtt.mappable_base + i915_gem_obj_ggtt_offset(obj),
- ringbuf->size);
- if (ringbuf->virtual_start == NULL) {
- ret = -EINVAL;
- goto err_unpin;
- }
-
ringbuf->obj = obj;
- return 0;
-err_unpin:
- i915_gem_object_ggtt_unpin(obj);
-err_unref:
- drm_gem_object_unreference(&obj->base);
- return ret;
+ return 0;
}
static int intel_init_ring_buffer(struct drm_device *dev,
@@ -1606,10 +1609,19 @@ static int intel_init_ring_buffer(struct drm_device *dev,
goto error;
}
- ret = intel_alloc_ringbuffer_obj(dev, ringbuf);
- if (ret) {
- DRM_ERROR("Failed to allocate ringbuffer %s: %d\n", ring->name, ret);
- goto error;
+ if (ringbuf->obj == NULL) {
+ ret = intel_alloc_ringbuffer_obj(dev, ringbuf);
+ if (ret) {
+ DRM_ERROR("Failed to allocate ringbuffer %s: %d\n", ring->name, ret);
+ goto error;
+ }
+
+ ret = intel_pin_and_map_ringbuffer_obj(dev, ringbuf);
+ if (ret) {
+ DRM_ERROR("Failed to pin and map ringbuffer %s: %d\n", ring->name, ret);
+ intel_destroy_ringbuffer_obj(ringbuf);
+ goto error;
+ }
}
/* Workaround an erratum on the i830 which causes a hang if
@@ -1647,6 +1659,7 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
intel_stop_ring_buffer(ring);
WARN_ON(!IS_GEN2(ring->dev) && (I915_READ_MODE(ring) & MODE_IDLE) == 0);
+ intel_unpin_ringbuffer_obj(ringbuf);
intel_destroy_ringbuffer_obj(ringbuf);
ring->preallocated_lazy_request = NULL;
ring->outstanding_lazy_seqno = 0;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 905d1ba..81be2db 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -371,6 +371,9 @@ intel_write_status_page(struct intel_engine_cs *ring,
#define I915_GEM_HWS_SCRATCH_INDEX 0x30
#define I915_GEM_HWS_SCRATCH_ADDR (I915_GEM_HWS_SCRATCH_INDEX << MI_STORE_DWORD_INDEX_SHIFT)
+void intel_unpin_ringbuffer_obj(struct intel_ringbuffer *ringbuf);
+int intel_pin_and_map_ringbuffer_obj(struct drm_device *dev,
+ struct intel_ringbuffer *ringbuf);
void intel_destroy_ringbuffer_obj(struct intel_ringbuffer *ringbuf);
int intel_alloc_ringbuffer_obj(struct drm_device *dev,
struct intel_ringbuffer *ringbuf);
--
1.7.9.5
next prev parent reply other threads:[~2014-07-24 16:05 UTC|newest]
Thread overview: 137+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-24 16:04 [PATCH 00/43] Execlists v5 Thomas Daniel
2014-07-24 16:04 ` [PATCH 01/43] drm/i915: Reorder the actual workload submission so that args checking is done earlier Thomas Daniel
2014-07-25 8:30 ` Daniel Vetter
2014-07-25 9:16 ` Chris Wilson
2014-07-24 16:04 ` [PATCH 02/43] drm/i915/bdw: New source and header file for LRs, LRCs and Execlists Thomas Daniel
2014-07-24 16:04 ` [PATCH 03/43] drm/i915/bdw: Macro for LRCs and module option for Execlists Thomas Daniel
2014-08-11 13:57 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 04/43] drm/i915/bdw: Initialization for Logical Ring Contexts Thomas Daniel
2014-08-11 14:03 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 05/43] drm/i915/bdw: Introduce one context backing object per engine Thomas Daniel
2014-08-11 13:59 ` [PATCH] drm/i915: WARN if module opt sanitization goes out of order Daniel Vetter
2014-08-11 14:28 ` Damien Lespiau
2014-07-24 16:04 ` [PATCH 06/43] drm/i915/bdw: A bit more advanced LR context alloc/free Thomas Daniel
2014-07-24 16:04 ` [PATCH 07/43] drm/i915/bdw: Allocate ringbuffers for Logical Ring Contexts Thomas Daniel
2014-07-24 16:04 ` [PATCH 08/43] drm/i915/bdw: Add a context and an engine pointers to the ringbuffer Thomas Daniel
2014-08-11 14:14 ` Daniel Vetter
2014-08-11 14:20 ` Daniel Vetter
2014-08-13 13:34 ` Daniel, Thomas
2014-08-13 15:16 ` Daniel Vetter
2014-08-14 15:09 ` Daniel, Thomas
2014-08-14 15:32 ` Daniel Vetter
2014-08-14 15:37 ` Daniel Vetter
2014-08-14 15:56 ` Daniel, Thomas
2014-08-14 16:19 ` Daniel Vetter
2014-08-14 16:27 ` [PATCH] drm/i915: Add temporary ring->ctx backpointer Daniel Vetter
2014-08-14 16:33 ` Daniel, Thomas
2014-07-24 16:04 ` [PATCH 09/43] drm/i915/bdw: Populate LR contexts (somewhat) Thomas Daniel
2014-07-24 16:04 ` [PATCH 10/43] drm/i915/bdw: Deferred creation of user-created LRCs Thomas Daniel
2014-08-11 14:25 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 11/43] drm/i915/bdw: Render moot context reset and switch with Execlists Thomas Daniel
2014-08-11 14:30 ` Daniel Vetter
2014-08-15 10:22 ` Daniel, Thomas
2014-08-15 15:39 ` Daniel Vetter
2014-08-20 15:29 ` [PATCH] " Thomas Daniel
2014-08-20 15:36 ` Chris Wilson
2014-08-25 20:39 ` Daniel Vetter
2014-08-25 22:01 ` Scot Doyle
2014-08-26 5:59 ` Chris Wilson
2014-08-26 13:54 ` Siluvery, Arun
2014-08-26 14:11 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 12/43] drm/i915/bdw: Don't write PDP in the legacy way when using LRCs Thomas Daniel
2014-08-01 13:46 ` Damien Lespiau
2014-08-07 12:17 ` Thomas Daniel
2014-08-08 15:59 ` Damien Lespiau
2014-08-11 14:32 ` Daniel Vetter
2014-08-15 11:01 ` [PATCH] " Thomas Daniel
2014-07-24 16:04 ` [PATCH 13/43] drm/i915: Abstract the legacy workload submission mechanism away Thomas Daniel
2014-08-11 14:36 ` Daniel Vetter
2014-08-11 14:39 ` Daniel Vetter
2014-08-11 14:39 ` Daniel Vetter
2014-08-11 15:02 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 14/43] drm/i915/bdw: Skeleton for the new logical rings submission path Thomas Daniel
2014-07-24 16:04 ` [PATCH 15/43] drm/i915/bdw: Generic logical ring init and cleanup Thomas Daniel
2014-08-11 15:01 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 16/43] drm/i915/bdw: GEN-specific logical ring init Thomas Daniel
2014-08-11 15:04 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 17/43] drm/i915/bdw: GEN-specific logical ring set/get seqno Thomas Daniel
2014-08-11 15:05 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 18/43] drm/i915/bdw: New logical ring submission mechanism Thomas Daniel
2014-08-11 20:40 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 19/43] drm/i915/bdw: GEN-specific logical ring emit request Thomas Daniel
2014-07-24 16:04 ` [PATCH 20/43] drm/i915/bdw: GEN-specific logical ring emit flush Thomas Daniel
2014-07-24 16:04 ` [PATCH 21/43] drm/i915/bdw: Emission of requests with logical rings Thomas Daniel
2014-08-11 20:56 ` Daniel Vetter
2014-08-13 13:34 ` Daniel, Thomas
2014-08-13 15:25 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 22/43] drm/i915/bdw: Ring idle and stop " Thomas Daniel
2014-07-24 16:04 ` [PATCH 23/43] drm/i915/bdw: Interrupts " Thomas Daniel
2014-08-11 21:02 ` Daniel Vetter
2014-08-11 21:08 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 24/43] drm/i915/bdw: GEN-specific logical ring emit batchbuffer start Thomas Daniel
2014-08-11 21:09 ` Daniel Vetter
2014-08-11 21:12 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 25/43] drm/i915/bdw: Workload submission mechanism for Execlists Thomas Daniel
2014-08-11 20:30 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 26/43] drm/i915/bdw: Always use MMIO flips with Execlists Thomas Daniel
2014-08-11 20:34 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 27/43] drm/i915/bdw: Render state init for Execlists Thomas Daniel
2014-08-11 21:25 ` Daniel Vetter
2014-08-13 15:07 ` Daniel, Thomas
2014-08-13 15:30 ` Daniel Vetter
2014-08-14 20:00 ` Daniel Vetter
2014-08-15 8:43 ` Daniel, Thomas
2014-08-20 15:55 ` Daniel, Thomas
2014-08-25 20:55 ` Daniel Vetter
2014-08-21 10:40 ` [PATCH] " Thomas Daniel
2014-08-28 9:40 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 28/43] drm/i915/bdw: Implement context switching (somewhat) Thomas Daniel
2014-08-11 21:29 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 29/43] drm/i915/bdw: Write the tail pointer, LRC style Thomas Daniel
2014-08-01 14:33 ` Damien Lespiau
2014-08-11 21:30 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 30/43] drm/i915/bdw: Two-stage execlist submit process Thomas Daniel
2014-08-14 20:05 ` Daniel Vetter
2014-08-14 20:10 ` Daniel Vetter
2014-08-15 8:51 ` Daniel, Thomas
2014-08-15 9:38 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 31/43] drm/i915/bdw: Handle context switch events Thomas Daniel
2014-08-14 20:13 ` Daniel Vetter
2014-08-14 20:17 ` Daniel Vetter
2014-08-14 20:28 ` Daniel Vetter
2014-08-14 20:37 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 32/43] drm/i915/bdw: Avoid non-lite-restore preemptions Thomas Daniel
2014-08-14 20:31 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 33/43] drm/i915/bdw: Help out the ctx switch interrupt handler Thomas Daniel
2014-08-14 20:43 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 34/43] drm/i915/bdw: Make sure gpu reset still works with Execlists Thomas Daniel
2014-08-01 14:42 ` Damien Lespiau
2014-08-06 9:26 ` Daniel, Thomas
2014-08-01 14:46 ` Damien Lespiau
2014-08-06 9:28 ` Daniel, Thomas
2014-07-24 16:04 ` [PATCH 35/43] drm/i915/bdw: Make sure error capture keeps working " Thomas Daniel
2014-08-15 12:14 ` Daniel Vetter
2014-08-21 10:57 ` Daniel, Thomas
2014-08-25 21:00 ` Daniel Vetter
2014-08-25 21:29 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 36/43] drm/i915/bdw: Disable semaphores for Execlists Thomas Daniel
2014-07-24 16:04 ` [PATCH 37/43] drm/i915/bdw: Display execlists info in debugfs Thomas Daniel
2014-08-01 14:54 ` Damien Lespiau
2014-08-07 12:23 ` Thomas Daniel
2014-08-08 16:02 ` Damien Lespiau
2014-07-24 16:04 ` [PATCH 38/43] drm/i915/bdw: Display context backing obj & ringbuffer " Thomas Daniel
2014-07-24 16:04 ` [PATCH 39/43] drm/i915/bdw: Print context state " Thomas Daniel
2014-08-01 15:54 ` Damien Lespiau
2014-08-07 12:24 ` Thomas Daniel
2014-08-08 15:57 ` Damien Lespiau
2014-07-24 16:04 ` [PATCH 40/43] drm/i915/bdw: Document Logical Rings, LR contexts and Execlists Thomas Daniel
2014-08-15 12:42 ` Daniel Vetter
2014-07-24 16:04 ` [PATCH 41/43] drm/i915/bdw: Enable Logical Ring Contexts (hence, Execlists) Thomas Daniel
2014-08-18 8:33 ` Jani Nikula
2014-08-18 14:52 ` Daniel, Thomas
2014-07-24 16:04 ` [PATCH 42/43] drm/i915/bdw: Pin the context backing objects to GGTT on-demand Thomas Daniel
2014-08-15 13:03 ` Daniel Vetter
2014-07-24 16:04 ` Thomas Daniel [this message]
2014-07-25 8:35 ` [PATCH 00/43] Execlists v5 Daniel Vetter
2014-08-01 16:09 ` Damien Lespiau
2014-08-01 16:29 ` Jesse Barnes
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