From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 18/40] drm/i915: Kill intel_reset_dpio() Date: Fri, 25 Jul 2014 14:56:39 +0300 Message-ID: <1406289399.23035.5.camel@intelbox> References: <1403910271-24984-1-git-send-email-ville.syrjala@linux.intel.com> <1403910271-24984-19-git-send-email-ville.syrjala@linux.intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1582731084==" Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 5853B6E80B for ; Fri, 25 Jul 2014 04:56:49 -0700 (PDT) In-Reply-To: <1403910271-24984-19-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1582731084== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-U1w0XhAQEKuSnpsHOaeV" --=-U1w0XhAQEKuSnpsHOaeV Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sat, 2014-06-28 at 02:04 +0300, ville.syrjala@linux.intel.com wrote: > From: Ville Syrj=C3=A4l=C3=A4 >=20 > Both VLV and CHV handle the cmnreset stuff in the power well code now, > so intel_reset_dpio() is no longer needed. >=20 > Signed-off-by: Ville Syrj=C3=A4l=C3=A4 Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_display.c | 31 ------------------------------= - > 1 file changed, 31 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index a16f635..3cd73f4 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1511,34 +1511,6 @@ static void intel_init_dpio(struct drm_device *dev= ) > } > } > =20 > -static void intel_reset_dpio(struct drm_device *dev) > -{ > - struct drm_i915_private *dev_priv =3D dev->dev_private; > - > - if (IS_CHERRYVIEW(dev)) { > - enum dpio_phy phy; > - u32 val; > - > - for (phy =3D DPIO_PHY0; phy < I915_NUM_PHYS_VLV; phy++) { > - /* Poll for phypwrgood signal */ > - if (wait_for(I915_READ(DISPLAY_PHY_STATUS) & > - PHY_POWERGOOD(phy), 1)) > - DRM_ERROR("Display PHY %d is not power up\n", phy); > - > - /* > - * Deassert common lane reset for PHY. > - * > - * This should only be done on init and resume from S3 > - * with both PLLs disabled, or we risk losing DPIO and > - * PLL synchronization. > - */ > - val =3D I915_READ(DISPLAY_PHY_CONTROL); > - I915_WRITE(DISPLAY_PHY_CONTROL, > - PHY_COM_LANE_RESET_DEASSERT(phy, val)); > - } > - } > -} > - > static void vlv_enable_pll(struct intel_crtc *crtc) > { > struct drm_device *dev =3D crtc->base.dev; > @@ -12473,8 +12445,6 @@ void intel_modeset_init_hw(struct drm_device *dev= ) > =20 > intel_init_clock_gating(dev); > =20 > - intel_reset_dpio(dev); > - > intel_enable_gt_powersave(dev); > } > =20 > @@ -12545,7 +12515,6 @@ void intel_modeset_init(struct drm_device *dev) > } > =20 > intel_init_dpio(dev); > - intel_reset_dpio(dev); > =20 > intel_cpu_pll_init(dev); > intel_shared_dpll_init(dev); --=-U1w0XhAQEKuSnpsHOaeV Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJT0kX3AAoJEORIIAnNuWDFYFYIAMLj+CrmMhqpurh3DX7eiSLV 1RAqaL4prAiLKeDh4972u2W7zggBk6I9IzU0d7/iGQ4q5tSkQm3y292IqXMKYfCP FmhEYgsKEtK0fbDwMH9nlmEv64WV9buxuT3dhjU6r+tpO6HDQOtlDnduE1t0xYZY JeN8kbXCboWPt6A47XInGjwQhS+9UgNhGbN0ISikbhfw4nQ2iyZc98+Sa799GX9j XstCRyzTKqaJI4QKIFTlGWa0EVqNb6ETHsYBIaLLnK/FjlFDWLn15L4qMgKhOKFj x3JKKXCKmD4Q4zX8B9DOv/xkUwyznPzu/oWG3RdGfbSZH3DJGi8brD6Ug8AnAhQ= =C3sc -----END PGP SIGNATURE----- --=-U1w0XhAQEKuSnpsHOaeV-- --===============1582731084== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1582731084==--