From mboxrd@z Thu Jan 1 00:00:00 1970 From: deepak.s@linux.intel.com Subject: [PATCH] drm/i915: Fix to Enable GT/PM Interrupts for cherryview. Date: Thu, 21 Aug 2014 13:37:09 +0530 Message-ID: <1408608429-27991-1-git-send-email-deepak.s@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id A74796E6AA for ; Wed, 20 Aug 2014 01:12:33 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org From: Deepak S Programing GT IER interrupts was fumbled while enabling Interrupts for gen8 This is a regression from commit abd58f0175915bed644aa67c8f69dc571b8280e0 Author: Ben Widawsky Date: Sat Nov 2 21:07:09 2013 -0700 drm/i915/bdw: Implement interrupt changes Signed-off-by: Deepak S --- drivers/gpu/drm/i915/i915_irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index d5445e7..48c02bc 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3812,7 +3812,7 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv) GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS1_IRQ_SHIFT | GT_RENDER_USER_INTERRUPT << GEN8_VCS2_IRQ_SHIFT | GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS2_IRQ_SHIFT, - 0, + dev_priv->pm_rps_events, GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT | GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT }; -- 1.9.1