From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: [PATCH 09/16] drm/i915: check for GT faults during S3 resume and S4 restore too Date: Wed, 10 Sep 2014 18:17:02 +0300 Message-ID: <1410362229-814-10-git-send-email-imre.deak@intel.com> References: <1410362229-814-1-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 5438989CF7 for ; Wed, 10 Sep 2014 08:24:18 -0700 (PDT) In-Reply-To: <1410362229-814-1-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org Checking for GT faults is not specific in any way to S4 thaw, so do it also during S3 resume and S4 restore. This allows us to unify the handlers for these events in an upcoming patch. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/i915_drv.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 5e25283..d0fee60 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -672,6 +672,8 @@ static int __i915_drm_thaw(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; if (drm_core_check_feature(dev, DRIVER_MODESET)) { + i915_check_and_clear_faults(dev); + mutex_lock(&dev->struct_mutex); i915_gem_restore_gtt_mappings(dev); mutex_unlock(&dev->struct_mutex); @@ -736,9 +738,6 @@ static int __i915_drm_thaw(struct drm_device *dev) static int i915_drm_thaw(struct drm_device *dev) { - if (drm_core_check_feature(dev, DRIVER_MODESET)) - i915_check_and_clear_faults(dev); - return __i915_drm_thaw(dev); } -- 1.8.4