From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 69/89] drm/i915/skl: Adding power domains for AUX controllers Date: Tue, 16 Sep 2014 15:35:15 +0300 Message-ID: <1410870915.19704.5.camel@intelbox> References: <1409830075-11139-1-git-send-email-damien.lespiau@intel.com> <1409830075-11139-70-git-send-email-damien.lespiau@intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1012783025==" Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 0745B6E0BC for ; Tue, 16 Sep 2014 05:36:27 -0700 (PDT) In-Reply-To: <1409830075-11139-70-git-send-email-damien.lespiau@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Damien Lespiau Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1012783025== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-UvPLgBGy1tD/o3618j1H" --=-UvPLgBGy1tD/o3618j1H Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2014-09-04 at 12:27 +0100, Damien Lespiau wrote: > From: Satheeshakrishna M >=20 > Adding new power doamins for AUX controllers >=20 > v2: Added new power domains in power_domain_str per Imre's comment >=20 > v3: Added AUX power domains to older platforms >=20 > v4: Rebase on top of POWER_DOMAIN_PLLS. >=20 > Signed-off-by: Satheeshakrishna M > Signed-off-by: Damien Lespiau (v3) > Signed-off-by: Daniel Vetter > --- This needs to be rebased on the recent CHV changes, adding the AUX domains to the CMN and TX wells similarly to the VLV mappings. With that this looks ok: Reviewed-by: Imre Deak > drivers/gpu/drm/i915/i915_debugfs.c | 8 ++++++++ > drivers/gpu/drm/i915/i915_drv.h | 4 ++++ > drivers/gpu/drm/i915/intel_pm.c | 12 ++++++++++++ > 3 files changed, 24 insertions(+) >=20 > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i= 915_debugfs.c > index 88a4643..02cb310 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2273,6 +2273,14 @@ static const char *power_domain_str(enum intel_dis= play_power_domain domain) > return "AUDIO"; > case POWER_DOMAIN_PLLS: > return "PLLS"; > + case POWER_DOMAIN_AUX_A: > + return "AUX_A"; > + case POWER_DOMAIN_AUX_B: > + return "AUX_B"; > + case POWER_DOMAIN_AUX_C: > + return "AUX_C"; > + case POWER_DOMAIN_AUX_D: > + return "AUX_D"; > case POWER_DOMAIN_INIT: > return "INIT"; > default: > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_= drv.h > index a6e14db..91ea2b7 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -138,6 +138,10 @@ enum intel_display_power_domain { > POWER_DOMAIN_VGA, > POWER_DOMAIN_AUDIO, > POWER_DOMAIN_PLLS, > + POWER_DOMAIN_AUX_A, > + POWER_DOMAIN_AUX_B, > + POWER_DOMAIN_AUX_C, > + POWER_DOMAIN_AUX_D, > POWER_DOMAIN_INIT, > =20 > POWER_DOMAIN_NUM, > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel= _pm.c > index 74a8519..ec849db 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -7664,6 +7664,10 @@ EXPORT_SYMBOL_GPL(i915_get_cdclk_freq); > BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) | \ > BIT(POWER_DOMAIN_PORT_CRT) | \ > BIT(POWER_DOMAIN_PLLS) | \ > + BIT(POWER_DOMAIN_AUX_A) | \ > + BIT(POWER_DOMAIN_AUX_B) | \ > + BIT(POWER_DOMAIN_AUX_C) | \ > + BIT(POWER_DOMAIN_AUX_D) | \ > BIT(POWER_DOMAIN_INIT)) > #define HSW_DISPLAY_POWER_DOMAINS ( \ > (POWER_DOMAIN_MASK & ~HSW_ALWAYS_ON_POWER_DOMAINS) | \ > @@ -7685,24 +7689,32 @@ EXPORT_SYMBOL_GPL(i915_get_cdclk_freq); > BIT(POWER_DOMAIN_PORT_DDI_C_2_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \ > BIT(POWER_DOMAIN_PORT_CRT) | \ > + BIT(POWER_DOMAIN_AUX_A) | \ > + BIT(POWER_DOMAIN_AUX_B) | \ > + BIT(POWER_DOMAIN_AUX_C) | \ > + BIT(POWER_DOMAIN_AUX_D) | \ > BIT(POWER_DOMAIN_INIT)) > =20 > #define VLV_DPIO_TX_B_LANES_01_POWER_DOMAINS ( \ > BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_B_4_LANES) | \ > + BIT(POWER_DOMAIN_AUX_B) | \ > BIT(POWER_DOMAIN_INIT)) > =20 > #define VLV_DPIO_TX_B_LANES_23_POWER_DOMAINS ( \ > BIT(POWER_DOMAIN_PORT_DDI_B_4_LANES) | \ > + BIT(POWER_DOMAIN_AUX_B) | \ > BIT(POWER_DOMAIN_INIT)) > =20 > #define VLV_DPIO_TX_C_LANES_01_POWER_DOMAINS ( \ > BIT(POWER_DOMAIN_PORT_DDI_C_2_LANES) | \ > BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \ > + BIT(POWER_DOMAIN_AUX_C) | \ > BIT(POWER_DOMAIN_INIT)) > =20 > #define VLV_DPIO_TX_C_LANES_23_POWER_DOMAINS ( \ > BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) | \ > + BIT(POWER_DOMAIN_AUX_C) | \ > BIT(POWER_DOMAIN_INIT)) > =20 > #define CHV_PIPE_A_POWER_DOMAINS ( \ --=-UvPLgBGy1tD/o3618j1H Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJUGC6DAAoJEORIIAnNuWDFX/MIAMLwUcO6YcIVxaFRy1uJ2gsq TwTRTU67RfAlwrsR2DKbeYAkjEQMuM1WUPlRWqlTRfByADVqG/2iqw50lvesGxBJ NUpmWgyFNaVlrIMbv99lahddN1sTv0lYMAbdAwy0J3+kuyvD9eQNYA4Wx+an9EK0 xuYjTjxjxSQOzyABSjOuLDeamQpyutu+y+F263beMFQ7+tSFQz5Jgaz1QGdaUgD0 yGRJOlUPtlSuWSKWhq37PVnL4yH+U+3uL4oEuKMlAHU8t/S0xfzJuRKLVrfqHgJP oSfOhHmb5ZGmFJwVJ1QrtYzoWidgJ8ZMFGADkJTKvYR9bfWB9ajtZbIX6BISN+0= =YlPB -----END PGP SIGNATURE----- --=-UvPLgBGy1tD/o3618j1H-- --===============1012783025== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1012783025==--