From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 2/2] drm/i915: only run hsw_power_well_post_enable when really needed Date: Tue, 7 Oct 2014 16:11:11 -0300 Message-ID: <1412709071-1886-2-git-send-email-przanoni@gmail.com> References: <1412709071-1886-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-qc0-f172.google.com (mail-qc0-f172.google.com [209.85.216.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 2588889E46 for ; Tue, 7 Oct 2014 12:11:39 -0700 (PDT) Received: by mail-qc0-f172.google.com with SMTP id o8so6483010qcw.3 for ; Tue, 07 Oct 2014 12:11:38 -0700 (PDT) In-Reply-To: <1412709071-1886-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni Only run it after we actually enable the power well. When we're booting the machine there are cases where we run hsw_power_well_post_enable without really needing, and even though this is not causing any real bugs, it is unneeded and causes confusion to people debugging interrupts. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 36749b9..39c33e0 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -221,9 +221,9 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, if (wait_for((I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE_ENABLED), 20)) DRM_ERROR("Timeout enabling power well\n"); + hsw_power_well_post_enable(dev_priv); } - hsw_power_well_post_enable(dev_priv); } else { if (enable_requested) { I915_WRITE(HSW_PWR_WELL_DRIVER, 0); -- 2.1.1